Lines Matching refs:VMOVDRR
727 // Turn f64->i64 into VMOVRRD, i64 -> f64 to VMOVDRR
922 case ARMISD::VMOVDRR: return "ARMISD::VMOVDRR";
1205 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
1220 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
2483 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2);
3217 Tmp0.getOpcode() == ARMISD::VMOVDRR;
3288 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
3331 /// use a VMOVDRR or VMOVRRD node. This should not be done when the non-i64
3346 // Turn i64->f64 into VMOVDRR.
3353 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi));
7291 // vmovrrd(vmovdrr x, y) -> x,y
7293 if (InDouble.getOpcode() == ARMISD::VMOVDRR)
7331 /// ARMISD::VMOVDRR. This is also used for BUILD_VECTORs with 2 operands.
7333 // N=vmovrrd(X); vmovdrr(N:0, N:1) -> bit_convert(X)
7441 // Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and
7443 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR &&
8417 case ARMISD::VMOVDRR: return PerformVMOVDRRCombine(N, DCI.DAG);
