Lines Matching refs:Rd
1546 // For {LD,ST}RD, Rt must be even, else undefined.
1918 unsigned Rd = fieldFromInstruction32(Insn, 8, 4);
1927 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1929 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1942 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
1950 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1952 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
1968 unsigned Rd = fieldFromInstruction32(Insn, 16, 4);
1977 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))
2099 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2100 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2117 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2129 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2133 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2151 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2166 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2186 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2201 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2216 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2225 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2373 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2374 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2521 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2533 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2537 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2555 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))
2570 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2591 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))
2606 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))
2621 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))
2630 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))
2644 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2645 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2658 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2662 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2689 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2690 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2702 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))
2709 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))
2713 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2737 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2738 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2743 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2745 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2747 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2772 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2773 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2793 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2795 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
2797 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))
2799 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder)))
2825 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2826 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2835 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2838 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2849 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2856 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2870 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2871 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2876 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))
2913 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2914 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2921 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
2924 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3479 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3484 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))
3488 if (Rd == Rn || Rd == Rt || Rd == Rt+1) return MCDisassembler::Fail;
3611 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3612 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3640 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3657 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3670 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3671 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3714 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3728 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3729 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3761 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3763 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3780 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3782 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd
3795 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3796 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3843 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3845 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3859 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3860 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3890 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3892 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3894 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3912 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3914 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3916 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3929 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3930 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3975 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
3977 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
3979 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
3993 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3994 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
4024 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4026 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4028 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4030 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
4048 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4050 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4052 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4054 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
4067 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
4068 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
4113 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
4115 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))
4117 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))
4119 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))
