Lines Matching defs:base
195 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
283 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
285 // swr src, offset(base)
286 // swl src, offset+3(base)
288 (0x2e << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
290 (0x2a << 26) | (base << 21) | (src << 16) | ((offset+3) & 0xffff));
296 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
299 if (dst != base) {
300 // lwr dst, offset(base)
301 // lwl dst, offset+3(base)
303 (0x26 << 26) | (base << 21) | (dst << 16) | (offset & 0xffff));
305 (0x22 << 26) | (base << 21) | (dst << 16) | ((offset+3) & 0xffff));
308 // lwr at, offset(base)
309 // lwl at, offset+3(base)
312 (0x26 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
314 (0x22 << 26) | (base << 21) | (at << 16) | ((offset+3) & 0xffff));
323 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
326 // sb src, offset(base)
328 // sb at, offset+1(base)
330 (0x28 << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
334 (0x28 << 26) | (base << 21) | (at << 16) | ((offset+1) & 0xffff));
340 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
343 // lbu at, offset(base)
344 // lb dst, offset+1(base)
348 (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
350 (0x20 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
360 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
363 // lbu at, offset(base)
364 // lbu dst, offset+1(base)
368 (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
370 (0x24 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
