Lines Matching refs:addReg
219 .addReg(StackReg, RegState::Kill)
226 .addReg(TmpReg, RegState::Kill)
229 .addReg(StackReg, RegState::Kill)
230 .addReg(TmpReg);
303 .addReg(PPC::R31)
309 .addReg(PPC::X1);
313 .addReg(PPC::X1);
317 .addReg(PPC::R1);
325 .addReg(Reg, RegState::Kill)
326 .addReg(PPC::X1, RegState::Define)
327 .addReg(MI.getOperand(1).getReg());
330 .addReg(PPC::X0, RegState::Kill)
331 .addReg(PPC::X1, RegState::Define)
332 .addReg(MI.getOperand(1).getReg());
336 .addReg(PPC::X1)
341 .addReg(PPC::X1)
343 .addReg(MI.getOperand(1).getReg(), RegState::ImplicitKill);
346 .addReg(Reg, RegState::Kill)
347 .addReg(PPC::R1, RegState::Define)
348 .addReg(MI.getOperand(1).getReg());
352 .addReg(PPC::R1)
357 .addReg(PPC::R1)
359 .addReg(MI.getOperand(1).getReg(), RegState::ImplicitKill);
397 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
404 .addReg(Reg, RegState::Kill)
410 .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())),
448 .addReg(Reg).addImm(32-ShiftBits).addImm(0)
453 .addReg(Reg);
580 .addReg(SReg, RegState::Kill)
