Lines Matching refs:ISD
38 ISD::ArgFlagsTy &ArgFlags, CCState &State)
51 ISD::ArgFlagsTy &ArgFlags, CCState &State)
82 const SmallVectorImpl<ISD::OutputArg> &Outs,
150 const SmallVectorImpl<ISD::InputArg>
206 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
207 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
215 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg);
217 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg,
219 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg);
261 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal);
262 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
277 ISD::LoadExtType LoadOp = ISD::SEXTLOAD;
280 FIPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, FIPtr,
285 Load = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Load);
299 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);
339 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
351 const SmallVectorImpl<ISD::OutputArg> &Outs,
353 const SmallVectorImpl<ISD::InputArg> &Ins,
376 ISD::ArgFlagsTy Flags = Outs[i].Flags;
409 ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
420 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
423 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
426 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
429 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
438 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
455 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
471 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
488 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
498 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
504 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
519 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg);
529 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff);
538 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
644 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
647 case ISD::SETEQ: return SPCC::ICC_E;
648 case ISD::SETNE: return SPCC::ICC_NE;
649 case ISD::SETLT: return SPCC::ICC_L;
650 case ISD::SETGT: return SPCC::ICC_G;
651 case ISD::SETLE: return SPCC::ICC_LE;
652 case ISD::SETGE: return SPCC::ICC_GE;
653 case ISD::SETULT: return SPCC::ICC_CS;
654 case ISD::SETULE: return SPCC::ICC_LEU;
655 case ISD::SETUGT: return SPCC::ICC_GU;
656 case ISD::SETUGE: return SPCC::ICC_CC;
662 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
665 case ISD::SETEQ:
666 case ISD::SETOEQ: return SPCC::FCC_E;
667 case ISD::SETNE:
668 case ISD::SETUNE: return SPCC::FCC_NE;
669 case ISD::SETLT:
670 case ISD::SETOLT: return SPCC::FCC_L;
671 case ISD::SETGT:
672 case ISD::SETOGT: return SPCC::FCC_G;
673 case ISD::SETLE:
674 case ISD::SETOLE: return SPCC::FCC_LE;
675 case ISD::SETGE:
676 case ISD::SETOGE: return SPCC::FCC_GE;
677 case ISD::SETULT: return SPCC::FCC_UL;
678 case ISD::SETULE: return SPCC::FCC_ULE;
679 case ISD::SETUGT: return SPCC::FCC_UG;
680 case ISD::SETUGE: return SPCC::FCC_UGE;
681 case ISD::SETUO: return SPCC::FCC_U;
682 case ISD::SETO: return SPCC::FCC_O;
683 case ISD::SETONE: return SPCC::FCC_LG;
684 case ISD::SETUEQ: return SPCC::FCC_UE;
697 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
699 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
704 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
705 setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
706 setOperationAction(ISD::ConstantPool , MVT::i32, Custom);
709 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
710 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
711 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
714 setOperationAction(ISD::UREM, MVT::i32, Expand);
715 setOperationAction(ISD::SREM, MVT::i32, Expand);
716 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
717 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
720 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
721 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
724 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
725 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
727 setOperationAction(ISD::BITCAST, MVT::f32, Expand);
728 setOperationAction(ISD::BITCAST, MVT::i32, Expand);
731 setOperationAction(ISD::SELECT, MVT::i32, Expand);
732 setOperationAction(ISD::SELECT, MVT::f32, Expand);
733 setOperationAction(ISD::SELECT, MVT::f64, Expand);
734 setOperationAction(ISD::SETCC, MVT::i32, Expand);
735 setOperationAction(ISD::SETCC, MVT::f32, Expand);
736 setOperationAction(ISD::SETCC, MVT::f64, Expand);
739 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
740 setOperationAction(ISD::BRIND, MVT::Other, Expand);
741 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
742 setOperationAction(ISD::BR_CC, MVT::i32, Custom);
743 setOperationAction(ISD::BR_CC, MVT::f32, Custom);
744 setOperationAction(ISD::BR_CC, MVT::f64, Custom);
746 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
747 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
748 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
752 setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
753 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand);
755 setOperationAction(ISD::FSIN , MVT::f64, Expand);
756 setOperationAction(ISD::FCOS , MVT::f64, Expand);
757 setOperationAction(ISD::FREM , MVT::f64, Expand);
758 setOperationAction(ISD::FMA , MVT::f64, Expand);
759 setOperationAction(ISD::FSIN , MVT::f32, Expand);
760 setOperationAction(ISD::FCOS , MVT::f32, Expand);
761 setOperationAction(ISD::FREM , MVT::f32, Expand);
762 setOperationAction(ISD::FMA , MVT::f32, Expand);
763 setOperationAction(ISD::CTPOP, MVT::i32, Expand);
764 setOperationAction(ISD::CTTZ , MVT::i32, Expand);
765 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
766 setOperationAction(ISD::CTLZ , MVT::i32, Expand);
767 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
768 setOperationAction(ISD::ROTL , MVT::i32, Expand);
769 setOperationAction(ISD::ROTR , MVT::i32, Expand);
770 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
771 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
772 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
773 setOperationAction(ISD::FPOW , MVT::f64, Expand);
774 setOperationAction(ISD::FPOW , MVT::f32, Expand);
776 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
777 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
778 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
781 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
782 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
784 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
787 setOperationAction(ISD::VASTART , MVT::Other, Custom);
789 setOperationAction(ISD::VAARG , MVT::Other, Custom);
792 setOperationAction(ISD::VACOPY , MVT::Other, Expand);
793 setOperationAction(ISD::VAEND , MVT::Other, Expand);
794 setOperationAction(ISD::STACKSAVE , MVT::Other, Expand);
795 setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
796 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom);
799 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
804 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
861 ISD::CondCode CC, unsigned &SPCC) {
864 CC == ISD::SETNE &&
890 return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi);
894 SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi);
895 SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32,
911 return DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi);
915 SDValue RelAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, Lo, Hi);
916 SDValue AbsAddr = DAG.getNode(ISD::ADD, dl, MVT::i32,
927 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
933 SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0));
940 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
973 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
1010 DAG.getNode(ISD::ADD, dl, MVT::i32,
1029 SDValue NextPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, VAList,
1047 DAG.getNode(ISD::BITCAST, dl, MVT::f64, V),
1060 SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value
1065 SDValue NewVal = DAG.getNode(ISD::ADD, dl, MVT::i32, NewSP,
1098 SDValue Ptr = DAG.getNode(ISD::ADD,
1129 SDValue Ptr = DAG.getNode(ISD::ADD,
1146 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
1147 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
1148 case ISD::GlobalTLSAddress:
1150 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
1151 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
1152 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
1153 case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG);
1154 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
1155 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
1156 case ISD::VASTART: return LowerVASTART(Op, DAG, *this);
1157 case ISD::VAARG: return LowerVAARG(Op, DAG);
1158 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
