Lines Matching defs:VA
1500 CCValAssign &VA = RVLocs[i];
1501 assert(VA.isRegLoc() && "Can only return in registers!");
1508 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
1521 if (VA.getLocReg() == X86::ST0 ||
1522 VA.getLocReg() == X86::ST1) {
1525 if (isScalarFPTypeInSSEReg(VA.getValVT()))
1536 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) {
1548 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag);
1647 CCValAssign &VA = RVLocs[i];
1648 EVT CopyVT = VA.getValVT();
1663 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) {
1666 if (isScalarFPTypeInSSEReg(VA.getValVT())) CopyVT = MVT::f80;
1674 if (CopyVT != VA.getValVT())
1675 Val = DAG.getNode(ISD::FP_ROUND, dl, VA.getValVT(), Val,
1679 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
1765 const CCValAssign &VA,
1777 if (VA.getLocInfo() == CCValAssign::Indirect)
1778 ValVT = VA.getLocVT();
1780 ValVT = VA.getValVT();
1789 int FI = MFI->CreateFixedObject(Bytes, VA.getLocMemOffset(), isImmutable);
1793 VA.getLocMemOffset(), isImmutable);
1842 CCValAssign &VA = ArgLocs[i];
1845 assert(VA.getValNo() != LastVal &&
1848 LastVal = VA.getValNo();
1850 if (VA.isRegLoc()) {
1851 EVT RegVT = VA.getLocVT();
1870 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1876 if (VA.getLocInfo() == CCValAssign::SExt)
1878 DAG.getValueType(VA.getValVT()));
1879 else if (VA.getLocInfo() == CCValAssign::ZExt)
1881 DAG.getValueType(VA.getValVT()));
1882 else if (VA.getLocInfo() == CCValAssign::BCvt)
1883 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
1885 if (VA.isExtInLoc()) {
1888 ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(),
1891 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
1894 assert(VA.isMemLoc());
1895 ArgValue = LowerMemArgument(Chain, CallConv, Ins, dl, DAG, VA, MFI, i);
1899 if (VA.getLocInfo() == CCValAssign::Indirect)
1900 ArgValue = DAG.getLoad(VA.getValVT(), dl, Chain, ArgValue,
2080 const CCValAssign &VA,
2082 unsigned LocMemOffset = VA.getLocMemOffset();
2218 CCValAssign &VA = ArgLocs[i];
2219 EVT RegVT = VA.getLocVT();
2225 switch (VA.getLocInfo()) {
2248 SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT());
2258 if (VA.isRegLoc()) {
2259 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2264 switch (VA.getLocReg()) {
2274 assert(VA.isMemLoc());
2278 dl, DAG, VA, Flags));
2367 CCValAssign &VA = ArgLocs[i];
2368 if (VA.isRegLoc())
2370 assert(VA.isMemLoc());
2374 int32_t Offset = VA.getLocMemOffset()+FPDiff;
2375 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8;
2381 SDValue Source = DAG.getIntPtrConstant(VA.getLocMemOffset());
2771 CCValAssign &VA = RVLocs[i];
2772 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1)
2834 CCValAssign &VA = ArgLocs[i];
2837 if (VA.getLocInfo() == CCValAssign::Indirect)
2839 if (!VA.isRegLoc()) {
2840 if (!MatchingStackOffset(Arg, VA.getLocMemOffset(), Flags,
2857 CCValAssign &VA = ArgLocs[i];
2858 if (!VA.isRegLoc())
2860 unsigned Reg = VA.getLocReg();
