Lines Matching refs:INSERT_VECTOR_ELT
107 /// lowering INSERT_VECTOR_ELT operations easier.
726 setOperationAction(ISD::INSERT_VECTOR_ELT,(MVT::SimpleValueType)VT, Expand);
806 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v1i64, Expand);
867 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
868 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
869 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
898 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f64, Custom);
902 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Custom);
964 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);
965 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
966 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
967 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
977 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Custom);
1141 setOperationAction(ISD::INSERT_VECTOR_ELT, SVT, Custom);
4685 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v8i16, V, ThisElt,
4716 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
5126 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, ZeroVec,
5307 Result = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Result,
5363 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ResVT, VecOp,
5740 NewV = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v8i16, NewV, ExtOp,
5850 NewV = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v8i16, NewV, InsElt,
5886 NewV = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v8i16, NewV, InsElt,
6925 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, V.getValueType(), V,
10835 case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG);
13867 } else if (InVec.getOpcode() == ISD::INSERT_VECTOR_ELT) {
