Lines Matching refs:X86InstrInfo
1 //===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===//
14 #include "X86InstrInfo.h"
91 X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
1128 X86InstrInfo::AddTableEntry(RegOp2MemOpTableType &R2MTable,
1143 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
1199 bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
1269 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
1277 unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
1290 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
1299 unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
1328 X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
1493 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB,
1553 X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
1664 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
1940 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
2150 bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
2161 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
2305 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
2326 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
2418 void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
2570 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
2587 void X86InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
2608 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
2622 void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
2662 bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
2677 X86InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
2755 X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
2910 unsigned X86InstrInfo::
2933 void X86InstrInfo::
2956 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
2997 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
3129 bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
3186 bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
3312 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
3419 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,
3438 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
3543 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
3592 bool X86InstrInfo::
3602 bool X86InstrInfo::
3616 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
3712 X86InstrInfo::getExecutionDomain(const MachineInstr *MI) const {
3723 void X86InstrInfo::setExecutionDomain(MachineInstr *MI, unsigned Domain) const {
3738 void X86InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
3742 bool X86InstrInfo::isHighLatencyDef(int opc) const {
3796 bool X86InstrInfo::
3834 const X86InstrInfo *TII = TM->getInstrInfo();
