Lines Matching full:i16
22 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
66 define <8 x i16> @v8i16_constvec_1() {
67 ret <8 x i16> < i16 32767, i16 32767, i16 32767, i16 32767,
68 i16 32767, i16 32767, i16 32767, i16 32767 >
72 define <8 x i16> @v8i16_constvec_2() {
73 ret <8 x i16> < i16 511, i16 511, i16 511, i16 511, i16 511,
74 i16 511, i16 511, i16 511 >
78 define <8 x i16> @v8i16_constvec_3() {
79 ret <8 x i16> < i16 -512, i16 -512, i16 -512, i16 -512, i16 -512,
80 i16 -512, i16 -512, i16 -512 >
86 define <8 x i16> @v8i16_constvec_4() {
87 ret <8 x i16> < i16 24672, i16 24672, i16 24672, i16 24672, i16 24672,
88 i16 24672, i16 24672, i16 24672 >
93 ; this is an i8 pattern but has to be expanded out to i16 to load it
