Lines Matching refs:mmu_idx
1800 int mmu_idx;
1801 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
1802 env->tlb_table[mmu_idx][i].addr_read = -1;
1803 env->tlb_table[mmu_idx][i].addr_write = -1;
1804 env->tlb_table[mmu_idx][i].addr_code = -1;
1835 int mmu_idx;
1846 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++)
1847 tlb_flush_entry(&env->tlb_table[mmu_idx][i], addr);
1908 int mmu_idx;
1909 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
1911 tlb_reset_dirty_range(&env->tlb_table[mmu_idx][i],
1960 int mmu_idx;
1961 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
1963 tlb_update_dirty(&env->tlb_table[mmu_idx][i]);
1978 int mmu_idx;
1982 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++)
1983 tlb_set_dirty1(&env->tlb_table[mmu_idx][i], vaddr);
1992 int mmu_idx, int is_softmmu)
2013 vaddr, (int)paddr, prot, mmu_idx, is_softmmu, pd);
2058 env->iotlb[mmu_idx][index] = iotlb - vaddr;
2059 te = &env->tlb_table[mmu_idx][index];
2104 if (memcheck_instrument_mmu && mmu_idx == 1 && !is_softmmu &&
2132 int mmu_idx, int is_softmmu)
