Lines Matching defs:rm
1973 int mod, rm, code, override, must_add_seg;
1980 rm = modrm & 7;
1985 base = rm;
2078 if (rm == 6) {
2082 rm = 0; /* avoid SS override */
2097 switch(rm) {
2134 if (rm == 2 || rm == 3 || rm == 6)
2151 int mod, rm, base, code;
2156 rm = modrm & 7;
2160 base = rm;
2184 if (rm == 6) {
2227 int mod, rm, opreg, disp;
2230 rm = (modrm & 7) | REX_B(s);
2235 gen_op_mov_reg_T0(ot, rm);
2237 gen_op_mov_TN_reg(ot, 0, rm);
3091 int modrm, mod, rm, reg, reg_addr, offset_addr;
3207 rm = (modrm & 7);
3209 offsetof(CPUX86State,fpregs[rm].mmx));
3224 rm = (modrm & 7) | REX_B(s);
3226 offsetof(CPUX86State,xmm_regs[rm]));
3239 rm = (modrm & 7) | REX_B(s);
3241 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3252 rm = (modrm & 7) | REX_B(s);
3254 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3264 rm = (modrm & 7) | REX_B(s);
3266 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(1)));
3274 rm = (modrm & 7) | REX_B(s);
3276 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3278 offsetof(CPUX86State,xmm_regs[rm].XMM_L(2)));
3290 rm = (modrm & 7) | REX_B(s);
3292 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3304 rm = (modrm & 7) | REX_B(s);
3306 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3314 rm = (modrm & 7) | REX_B(s);
3316 offsetof(CPUX86State,xmm_regs[rm].XMM_L(1)));
3318 offsetof(CPUX86State,xmm_regs[rm].XMM_L(3)));
3358 rm = (modrm & 7) | REX_B(s);
3360 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3369 rm = (modrm & 7);
3370 gen_op_movq(offsetof(CPUX86State,fpregs[rm].mmx),
3384 rm = (modrm & 7) | REX_B(s);
3385 gen_op_movo(offsetof(CPUX86State,xmm_regs[rm]),
3395 rm = (modrm & 7) | REX_B(s);
3396 gen_op_movl(offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)),
3405 rm = (modrm & 7) | REX_B(s);
3406 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
3452 rm = (modrm & 7) | REX_B(s);
3453 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3455 rm = (modrm & 7);
3456 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3463 rm = (modrm & 7) | REX_B(s);
3465 offsetof(CPUX86State,xmm_regs[rm]));
3471 rm = (modrm & 7) | REX_B(s);
3473 offsetof(CPUX86State,xmm_regs[rm]));
3486 rm = (modrm & 7);
3487 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3526 rm = (modrm & 7) | REX_B(s);
3527 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3562 rm = (modrm & 7) | REX_B(s);
3563 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3599 rm = (modrm & 7) | REX_B(s);
3601 offsetof(CPUX86State,xmm_regs[rm].XMM_W(val)));
3604 rm = (modrm & 7);
3606 offsetof(CPUX86State,fpregs[rm].mmx.MMX_W(val)));
3616 rm = (modrm & 7) | REX_B(s);
3617 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
3619 gen_op_movq_env_0(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(1)));
3624 rm = (modrm & 7);
3626 offsetof(CPUX86State,fpregs[rm].mmx));
3631 rm = (modrm & 7) | REX_B(s);
3633 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3640 rm = (modrm & 7) | REX_B(s);
3641 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm]));
3644 rm = (modrm & 7);
3645 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx));
3658 rm = modrm & 7;
3671 op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
3706 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3757 rm = modrm & 7;
3769 rm = (modrm & 7) | REX_B(s);
3779 gen_op_mov_reg_T0(ot, rm);
3788 gen_op_mov_reg_T0(ot, rm);
3800 gen_op_mov_reg_v(ot, rm, cpu_T[0]);
3810 gen_op_mov_reg_v(ot, rm, cpu_tmp1_i64);
3823 gen_op_mov_reg_T0(ot, rm);
3830 gen_op_mov_TN_reg(OT_LONG, 0, rm);
3840 offsetof(CPUX86State,xmm_regs[rm]
3870 gen_op_mov_v_reg(ot, cpu_tmp0, rm);
3881 gen_op_mov_v_reg(ot, cpu_tmp1_i64, rm);
3900 op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
3909 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3964 rm = (modrm & 7) | REX_B(s);
3965 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3974 rm = (modrm & 7);
3975 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
4045 int modrm, reg, rm, mod, reg_addr, op, opreg, offset_addr, val;
4208 rm = (modrm & 7) | REX_B(s);
4212 } else if (op == OP_XORL && rm == reg) {
4221 opreg = rm;
4230 rm = (modrm & 7) | REX_B(s);
4234 } else if (op == OP_XORL && rm == reg) {
4237 gen_op_mov_TN_reg(ot, 1, rm);
4266 rm = (modrm & 7) | REX_B(s);
4277 opreg = rm;
4315 rm = (modrm & 7) | REX_B(s);
4323 gen_op_mov_TN_reg(ot, 0, rm);
4338 gen_op_mov_reg_T0(ot, rm);
4346 gen_op_mov_reg_T0(ot, rm);
4547 rm = (modrm & 7) | REX_B(s);
4570 gen_op_mov_TN_reg(ot, 0, rm);
4578 opreg = rm;
4585 opreg = rm;
4661 rm = (modrm & 7) | REX_B(s);
4794 rm = (modrm & 7) | REX_B(s);
4796 gen_op_mov_TN_reg(ot, 1, rm);
4799 gen_op_mov_reg_T0(ot, rm);
4830 rm = (modrm & 7) | REX_B(s);
4831 gen_op_mov_v_reg(ot, t0, rm);
4836 rm = 0; /* avoid warning */
4848 gen_op_mov_reg_v(ot, rm, t1);
4947 rm = (modrm & 7) | REX_B(s);
4948 gen_op_mov_reg_T0(ot, rm);
5126 rm = (modrm & 7) | REX_B(s);
5129 gen_op_mov_TN_reg(ot, 0, rm);
5262 rm = R_EAX;
5274 rm = (modrm & 7) | REX_B(s);
5277 gen_op_mov_TN_reg(ot, 1, rm);
5278 gen_op_mov_reg_T0(ot, rm);
5400 rm = (modrm & 7) | REX_B(s);
5406 opreg = rm;
5430 rm = modrm & 7;
5640 opreg = rm;
5653 switch(rm) {
5666 switch(rm) {
5686 switch(rm) {
5721 switch(rm) {
5750 switch(rm) {
5808 switch(rm) {
5820 switch(rm) {
5874 switch(rm) {
5890 switch(rm) {
6314 rm = (modrm & 7) | REX_B(s);
6315 gen_op_mov_v_reg(ot, t0, rm);
6450 rm = (modrm & 7) | REX_B(s);
6456 gen_op_mov_TN_reg(ot, 0, rm);
6481 rm = (modrm & 7) | REX_B(s);
6492 gen_op_mov_TN_reg(ot, 0, rm);
6527 gen_op_mov_reg_T0(ot, rm);
6982 rm = modrm & 7;
6999 switch (rm) {
7053 switch(rm) {
7180 if (CODE64(s) && rm == 0) {
7225 rm = (modrm & 7) | REX_B(s);
7228 gen_op_mov_TN_reg(OT_LONG, 0, rm);
7257 rm = modrm & 7;
7262 gen_op_mov_v_reg(ot, t0, rm);
7277 gen_op_mov_reg_v(ot, rm, t0);
7348 rm = (modrm & 7) | REX_B(s);
7364 gen_op_mov_TN_reg(ot, 0, rm);
7370 gen_op_mov_reg_T0(ot, rm);
7386 rm = (modrm & 7) | REX_B(s);
7397 gen_op_mov_TN_reg(ot, 0, rm);
7404 gen_op_mov_reg_T0(ot, rm);
