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Lines Matching defs:Prefix

82    Prefix"):
652 The top 16 bits of the prefix are 0x3141, just as a hacky way
653 to ensure it really is a valid prefix.
655 Things you can safely assume about a well-formed prefix:
662 typedef UInt Prefix;
671 #define PFX_LOCK (1<<7) /* bus LOCK prefix present (0xF0) */
672 #define PFX_F2 (1<<8) /* REP/REPE/REPZ prefix present (0xF2) */
673 #define PFX_F3 (1<<9) /* REPNE/REPNZ prefix present (0xF3) */
674 #define PFX_CS (1<<10) /* CS segment prefix present (0x2E) */
675 #define PFX_DS (1<<11) /* DS segment prefix present (0x3E) */
676 #define PFX_ES (1<<12) /* ES segment prefix present (0x26) */
677 #define PFX_FS (1<<13) /* FS segment prefix present (0x64) */
678 #define PFX_GS (1<<14) /* GS segment prefix present (0x65) */
679 #define PFX_SS (1<<15) /* SS segment prefix present (0x36) */
683 static Bool IS_VALID_PFX ( Prefix pfx ) {
687 static Bool haveREX ( Prefix pfx ) {
691 static Int getRexW ( Prefix pfx ) {
695 static Int getRexR ( Prefix pfx ) {
699 static Int getRexX ( Prefix pfx ) {
702 static Int getRexB ( Prefix pfx ) {
706 /* Check a prefix doesn't have F2 or F3 set in it, since usually that
708 static Bool haveF2orF3 ( Prefix pfx ) {
711 static Bool haveF2 ( Prefix pfx ) {
714 static Bool haveF3 ( Prefix pfx ) {
718 static Bool have66 ( Prefix pfx ) {
721 static Bool haveASO ( Prefix pfx ) {
726 static Bool have66noF2noF3 ( Prefix pfx )
733 static Bool haveF2no66noF3 ( Prefix pfx )
740 static Bool haveF3no66noF2 ( Prefix pfx )
747 static Bool haveF3noF2 ( Prefix pfx )
754 static Bool haveF2noF3 ( Prefix pfx )
761 static Bool haveNo66noF2noF3 ( Prefix pfx )
768 static Bool have66orF2orF3 ( Prefix pfx )
774 static Bool have66orF2 ( Prefix pfx )
779 /* Clear all the segment-override bits in a prefix. */
780 static Prefix clearSegBits ( Prefix p )
823 the same fashion that an 0x66 prefix indicates the operand size is
1124 static IRExpr* getIReg64rexX ( Prefix pfx, UInt lo3bits )
1131 static HChar* nameIReg64rexX ( Prefix pfx, UInt lo3bits )
1138 static HChar* nameIRegRexB ( Int sz, Prefix pfx, UInt lo3bits )
1147 static IRExpr* getIRegRexB ( Int sz, Prefix pfx, UInt lo3bits )
1170 static void putIRegRexB ( Int sz, Prefix pfx, UInt lo3bits, IRExpr* e )
1192 static UInt gregOfRexRM ( Prefix pfx, UChar mod_reg_rm )
1204 static UInt eregOfRexRM ( Prefix pfx, UChar mod_reg_rm )
1220 static UInt offsetIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm )
1231 IRExpr* getIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm )
1245 void putIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm, IRExpr* e )
1255 HChar* nameIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm )
1267 static UInt offsetIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm )
1278 IRExpr* getIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm )
1292 void putIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm, IRExpr* e )
1302 HChar* nameIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm )
2141 HChar* segRegTxt ( Prefix pfx )
2159 Prefix pfx, IRExpr* virtual )
2283 VexAbiInfo* vbi, Prefix pfx, Long delta,
2554 static UInt lengthAMode ( Prefix pfx, Long delta )
2662 Prefix pfx,
2778 Prefix pfx,
2911 Prefix pfx,
2957 Prefix pfx,
3038 Prefix pfx,
3142 Prefix pfx,
3252 Prefix pfx,
3522 Prefix pfx,
3713 Prefix pfx, Int sz, Long delta, Bool* decode_OK )
3877 Prefix pfx, Long delta, Bool* decode_OK )
3947 Prefix pfx, Int sz, Long delta,
4121 void dis_string_op( void (*dis_OP)( Int, IRTemp, Prefix pfx ),
4122 Int sz, HChar* name, Prefix pfx )
4134 void dis_MOVS ( Int sz, IRTemp t_inc, Prefix pfx )
4162 void dis_LODS ( Int sz, IRTemp t_inc, Prefix pfx )
4182 void dis_STOS ( Int sz, IRTemp t_inc, Prefix pfx )
4205 void dis_CMPS ( Int sz, IRTemp t_inc, Prefix pfx )
4239 void dis_SCAS ( Int sz, IRTemp t_inc, Prefix pfx )
4270 void (*dis_OP)(Int, IRTemp, Prefix),
4272 Prefix pfx )
4321 Prefix pfx,
4364 Prefix pfx,
4882 VexAbiInfo* vbi, Prefix pfx, Long delta )
6506 Prefix pfx,
6656 Prefix pfx, Long delta,
6788 VexAbiInfo* vbi, Prefix pfx, Int sz, Long delta )
7224 Prefix pfx,
7409 Prefix pfx, Int sz, Long delta, BtOp op )
7567 Prefix pfx, Int sz, Long delta, Bool fwds )
7683 void codegen_xchg_rAX_Reg ( Prefix pfx, Int sz, UInt regLo3 )
7767 Prefix pfx,
7786 reg-reg: ignore any lock prefix, generate sequence based
7789 reg-mem, not locked: ignore any lock prefix, generate sequence
7874 Prefix pfx,
7927 Prefix pfx, Int sz, Long delta0 )
7940 reg-reg: ignore any lock prefix,
7943 reg-mem, not locked: ignore any lock prefix, generate 'naive'
8108 Prefix pfx, Long delta,
8145 Prefix pfx, Long delta,
8155 Prefix pfx, Long delta,
8165 Prefix pfx, Long delta,
8201 Prefix pfx, Long delta,
8238 Prefix pfx, Long delta,
8269 Prefix pfx, Long delta,
8313 Prefix pfx, Long delta,
8359 Prefix pfx, Long delta,
8446 Prefix pfx, Long delta,
8510 Prefix pfx, Long delta,
8586 ULong dis_SSE_shiftE_imm ( Prefix pfx,
8916 byte) may validly be used with a LOCK prefix. The following insns
9082 2 if an 0x66 prefix is seen and 8 if REX.W is 1. In case of
9087 Prefix pfx = PFX_EMPTY;
9216 /* We have a %fs prefix. Reject it if there's no evidence in 'vbi'
9231 leading F2 or F3. Check that any LOCK prefix is actually
16599 the address size prefix can have an effect. It changes the
16681 /* NOTE! this is the one place where a segment override prefix
17305 /* 24 July 06: has also been seen with a redundant REX prefix,
17404 //.. case 0xA4: /* MOVS, no REP prefix */
17409 //.. case 0xA6: /* CMPSb, no REP prefix */
17415 case 0xAC: /* LODS, no REP prefix */
17420 //.. case 0xAE: /* SCAS, no REP prefix */
17471 //.. /* REPNE prefix insn */
17602 prefix. Therefore, surround it with a IRStmt_MBE(Imbe_BusLock)
17604 used with an explicit LOCK prefix, we don't want to end up with
18133 prefix. Life is too short to bother with generating two
18134 different translations for the with/without-LOCK-prefix
18853 vpanic("disInstr_AMD64: inconsistency in LOCK prefix handling");