Lines Matching full:opc2
2901 UInt opc2 = ifieldOPClo9(theInstr);
2989 switch (opc2) {
3506 vex_printf("dis_int_arith(ppc)(opc2)\n");
3539 UInt opc2 = ifieldOPClo10(theInstr);
3592 switch (opc2) {
3632 vex_printf("dis_int_cmp(ppc)(opc2)\n");
3657 UInt opc2 = ifieldOPClo10(theInstr);
3715 switch (opc2) {
3986 vex_printf("dis_int_logic(ppc)(opc2)\n");
4014 UInt opc2 = ifieldOPClo10(theInstr);
4047 switch (opc2) {
4123 vex_printf("dis_int_parity(ppc)(opc2)\n");
4147 UChar opc2 = toUChar( IFIELD( theInstr, 2, 3 ) );
4279 switch (opc2) {
4363 vex_printf("dis_int_rot(ppc)(opc2)\n");
4394 UInt opc2 = ifieldOPClo10(theInstr);
4491 switch (opc2) {
4595 vex_printf("dis_int_load(ppc)(opc2)\n");
4626 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
4651 UInt opc2 = ifieldOPClo10(theInstr);
4729 switch (opc2) {
4793 vex_printf("dis_int_store(ppc)(opc2)\n");
4814 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
4982 UInt opc2 = ifieldOPClo10(theInstr);
4996 switch (opc2) {
5063 vex_printf("dis_int_ldst_str(ppc)(opc2)\n");
5152 UInt opc2 = ifieldOPClo10(theInstr);
5260 switch (opc2) {
5335 vex_printf("dis_int_branch(ppc)(opc2)\n");
5362 UInt opc2 = ifieldOPClo10(theInstr);
5374 if (opc2 == 0) { // mcrf (Move Cond Reg Field, PPC32 p464)
5390 switch (opc2) {
5431 vex_printf("dis_cond_logic(ppc)(opc2)\n");
5590 UInt opc2 = ifieldOPClo10(theInstr);
5601 switch (opc2) {
5695 UInt opc2 = ifieldOPClo10(theInstr);
5706 if (opc2 != 0x096) {
5707 vex_printf("dis_memsync(ppc)(0x13,opc2)\n");
5720 switch (opc2) {
5878 vex_printf("dis_memsync(ppc)(opc2)\n");
5903 UInt opc2 = ifieldOPClo10(theInstr);
5922 switch (opc2) {
6112 vex_printf("dis_int_shift(ppc)(opc2)\n");
6173 UInt opc2 = ifieldOPClo10(theInstr);
6188 switch (opc2) {
6249 vex_printf("dis_int_ldst_rev(ppc)(opc2)\n");
6278 UInt opc2 = ifieldOPClo10(theInstr);
6295 switch (opc2) {
6504 vex_printf("dis_proc_ctl(ppc)(opc2)\n");
6523 UInt opc2 = ifieldOPClo10(theInstr);
6534 if (opc1 == 0x1F && opc2 == 0x116) {
6538 if (opc1 == 0x1F && opc2 == 0x3F6) { // dcbz
6559 switch (opc2) {
6655 vex_printf("dis_cache_manage(ppc)(opc2)\n");
6707 UInt opc2 = ifieldOPClo10(theInstr);
6765 switch(opc2) {
6821 vex_printf("dis_fp_load(ppc)(opc2)\n");
6845 UInt opc2 = ifieldOPClo10(theInstr);
6908 switch(opc2) {
6952 vex_printf("dis_fp_store(ppc)(opc2)\n");
6977 UChar opc2 = ifieldOPClo5(theInstr);
7003 switch (opc2) {
7076 vex_printf("dis_fp_arith(ppc)(3B: opc2)\n");
7082 switch (opc2) {
7178 vex_printf("dis_fp_arith(ppc)(3F: opc2)\n");
7216 UChar opc2 = ifieldOPClo5(theInstr);
7257 switch (opc2) {
7289 vex_printf("dis_fp_multadd(ppc)(3B: opc2)\n");
7295 switch (opc2) {
7327 vex_printf("dis_fp_multadd(ppc)(3F: opc2)\n");
7679 UInt opc2 = ifieldOPClo10(theInstr);
7688 switch (opc2) {
7730 vex_printf("dis_fp_tests(ppc)(opc2)\n");
7748 UInt opc2 = ifieldOPClo10(theInstr);
7820 switch (opc2) {
7828 vex_printf("dis_fp_cmp(ppc)(opc2)\n");
7846 UInt opc2 = ifieldOPClo10(theInstr);
7876 switch (opc2) {
7893 switch (opc2) {
7920 DIP("fctiwu%s%s fr%u,fr%u\n", opc2 == 0x08F ? "z" : "",
7924 opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm,
7953 DIP("fctidu%s%s fr%u,fr%u\n", opc2 == 0x3AE ? "" : "z",
7956 binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) );
7976 switch(opc2) {
8022 vex_printf("dis_fp_round(ppc)(opc2)\n");
8054 UInt opc2 = ifieldOPClo10(theInstr);
8070 switch(opc2) {
8079 vex_printf("dis_fp_pair(ppc) : X-form wrong opc2\n");
8133 UInt opc2 = ifieldOPClo10(theInstr);
8143 if (opc1 != 0x3F || (frA_addr != 0 && opc2 != 0x008)) {
8150 switch (opc2) {
8205 vex_printf("dis_fp_move(ppc)(opc2)\n");
8231 UInt opc2 = ifieldOPClo10(theInstr);
8239 switch (opc2) {
8357 vex_printf("dis_fp_scr(ppc)(opc2)\n");
8382 UInt opc2 = ifieldOPClo10(theInstr);
8390 switch (opc2) {
8403 vex_printf("dis_av_datastream(ppc)(opc2,dst)\n");
8414 vex_printf("dis_av_datastream(ppc)(opc2)\n");
8430 UInt opc2 = IFIELD( theInstr, 0, 11 );
8437 switch (opc2) {
8440 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
8450 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
8459 vex_printf("dis_av_procctl(ppc)(opc2)\n");
8469 dis_vx_conv ( UInt theInstr, UInt opc2 )
8485 switch (opc2) {
8537 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
8542 switch (opc2) {
8621 Bool un_signed = (opc2 == 0x110);
8899 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
8909 dis_vxv_dp_arith ( UInt theInstr, UInt opc2 )
8932 switch (opc2) {
8940 switch (opc2) {
9011 switch (opc2) {
9016 mdp = (opc2 & 0x0FF) == 0x0A4;
9023 mdp = (opc2 & 0x0FF) == 0x0E4;
9030 switch (opc2) {
9142 vex_printf( "dis_vxv_dp_arith(ppc)(opc2)\n" );
9152 dis_vxv_sp_arith ( UInt theInstr, UInt opc2 )
9175 switch (opc2) {
9272 switch (opc2) {
9275 msp = (opc2 & 0x0FF) == 0x024;
9282 msp = (opc2 & 0x0FF) == 0x064;
9291 switch (opc2) {
9462 vex_printf( "dis_vxv_sp_arith(ppc)(opc2)\n" );
9661 static IRExpr * _do_vsx_fp_roundToInt(IRTemp frB_I64, UInt opc2, UChar * insn_suffix)
9671 switch (opc2 & 0x7F) {
9694 vex_printf( "_do_vsx_fp_roundToInt(ppc)(opc2)\n" );
9750 dis_vxv_misc ( UInt theInstr, UInt opc2 )
9762 switch (opc2) {
9771 Bool redp = opc2 == 0x1B4;
9820 Bool resp = opc2 == 0x134;
9888 Bool isMin = opc2 == 0x320 ? True : False;
9937 Bool isMin = opc2 == 0x3A0 ? True : False;
10037 Bool make_negative = (opc2 == 0x3D2) ? True : False;
10064 Bool make_negative = (opc2 == 0x352) ? True : False;
10124 frD_fp_roundHi = _do_vsx_fp_roundToInt(frBHi_I64, opc2, insn_suffix);
10126 frD_fp_roundLo = _do_vsx_fp_roundToInt(frBLo_I64, opc2, insn_suffix);
10143 if (opc2 != 0x156) {
10145 switch (opc2) {
10164 vex_printf( "dis_vxv_misc(ppc)(vrspi<x>)(opc2)\n" );
10186 _do_vsx_fp_roundToInt(b3_I64, opc2, insn_suffix));
10188 _do_vsx_fp_roundToInt(b2_I64, opc2, insn_suffix));
10190 _do_vsx_fp_roundToInt(b1_I64, opc2, insn_suffix));
10192 _do_vsx_fp_roundToInt(b0_I64, opc2, insn_suffix));
10207 vex_printf( "dis_vxv_misc(ppc)(opc2)\n" );
10218 dis_vxs_arith ( UInt theInstr, UInt opc2 )
10241 switch (opc2) {
10261 Bool mdp = opc2 == 0x0A4;
10276 Bool mdp = opc2 == 0x0E4;
10295 Bool mdp = opc2 == 0x2A4;
10314 Bool mdp = opc2 == 0x2E4;
10391 vex_printf( "dis_vxs_arith(ppc)(opc2)\n" );
10403 dis_vx_cmp( UInt theInstr, UInt opc2 )
10421 switch (opc2) {
10425 DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o",
10432 vex_printf( "dis_vx_cmp(ppc)(opc2)\n" );
10527 dis_vvec_cmp( UInt theInstr, UInt opc2 )
10546 switch (opc2) {
10614 vex_printf( "dis_vvec_cmp(ppc)(opc2)\n" );
10623 dis_vxs_misc( UInt theInstr, UInt opc2 )
10646 switch (opc2) {
10711 Bool isMin = opc2 == 0x2A0 ? True : False;
10731 frD_fp_round = _do_vsx_fp_roundToInt(frB_I64, opc2, insn_suffix);
10748 Bool redp = opc2 == 0x0B4;
10771 vex_printf( "dis_vxs_misc(ppc)(opc2)\n" );
10781 dis_vx_logic ( UInt theInstr, UInt opc2 )
10799 switch (opc2) {
10823 vex_printf( "dis_vx_logic(ppc)(opc2)\n" );
10841 UInt opc2 = ifieldOPClo10( theInstr );
10853 switch (opc2) {
10912 vex_printf( "dis_vx_load(ppc)(opc2)\n" );
10931 UInt opc2 = ifieldOPClo10( theInstr );
10944 switch (opc2) {
10995 vex_printf( "dis_vx_store(ppc)(opc2)\n" );
11005 dis_vx_permute_misc( UInt theInstr, UInt opc2 )
11024 switch (opc2) {
11066 char type = (opc2 == 0x48) ? 'h' : 'l';
11067 IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64;
11116 vex_printf( "dis_vx_permute_misc(ppc)(opc2)\n" );
11132 UInt opc2 = ifieldOPClo10(theInstr);
11147 switch (opc2) {
11246 vex_printf("dis_av_load(ppc)(opc2)\n");
11262 UInt opc2 = ifieldOPClo10(theInstr);
11280 switch (opc2) {
11332 vex_printf("dis_av_store(ppc)(opc2)\n");
11348 UInt opc2 = IFIELD( theInstr, 0, 11 );
11374 switch (opc2) {
11786 vex_printf("dis_av_arith(ppc)(opc2=0x%x)\n", opc2);
11802 UInt opc2 = IFIELD( theInstr, 0, 11 );
11814 switch (opc2) {
11843 vex_printf("dis_av_logic(ppc)(opc2=0x%x)\n", opc2);
11860 UInt opc2 = IFIELD( theInstr, 0, 10 );
11873 switch (opc2) {
11929 vex_printf("dis_av_cmp(ppc)(opc2)\n");
11952 UChar opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
11988 switch (opc2) {
12201 vex_printf("dis_av_multarith(ppc)(opc2)\n");
12217 UInt opc2 = IFIELD( theInstr, 0, 11 );
12229 switch (opc2) {
12338 vex_printf("dis_av_shift(ppc)(opc2)\n");
12358 UInt opc2
12374 switch (opc2) {
12433 opc2 = IFIELD( theInstr, 0, 11 );
12434 switch (opc2) {
12519 vex_printf("dis_av_permute(ppc)(opc2)\n");
12535 UInt opc2 = IFIELD( theInstr, 0, 11 );
12549 switch (opc2) {
12686 switch (opc2) {
12784 vex_printf("dis_av_pack(ppc)(opc2)\n");
12802 UInt opc2=0;
12816 opc2 = IFIELD( theInstr, 0, 6 );
12817 switch (opc2) {
12840 opc2 = IFIELD( theInstr, 0, 11 );
12841 switch (opc2) {
12872 switch (opc2) {
12894 vex_printf("dis_av_fp_arith(ppc)(opc2=0x%x)\n",opc2);
12911 UInt opc2 = IFIELD( theInstr, 0, 10 );
12926 switch (opc2) {
12981 vex_printf("dis_av_fp_cmp(ppc)(opc2)\n");
13003 UInt opc2 = IFIELD( theInstr, 0, 11 );
13025 switch (opc2) {
13064 switch (opc2) {
13086 vex_printf("dis_av_fp_convert(ppc)(opc2)\n");
13328 UInt opc2;
13438 /* We don't know what it is. Set opc1/opc2 so decode_failure
13442 opc2 = ifieldOPClo10(theInstr);
13449 opc2 = ifieldOPClo10(theInstr);
13544 opc2 = ifieldOPClo10(theInstr);
13545 switch (opc2) {
13558 opc2 = IFIELD(theInstr, 1, 5);
13559 switch (opc2) {
13592 UInt vsxOpc2 = get_VSX60_opc2(opc2);
13716 opc2 = IFIELD(theInstr, 1, 5);
13717 switch (opc2) {
13747 opc2 = IFIELD(theInstr, 1, 10);
13748 switch (opc2) {
13811 switch (opc2) {
13842 opc2 = IFIELD(theInstr, 1, 9);
13843 switch (opc2) {
13884 opc2 = IFIELD(theInstr, 1, 10);
13885 switch (opc2) {
14121 opc2 = IFIELD(theInstr, 0, 6);
14122 switch (opc2) {
14149 opc2 = IFIELD(theInstr, 0, 11);
14150 switch (opc2) {
14243 opc2 = IFIELD(theInstr, 0, 10);
14244 switch (opc2) {
14294 opc2 = (theInstr) & 0x7FF;
14298 opc1, opc1, opc2, opc2);
