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Lines Matching refs:sLo

2493             HReg sHi, sLo;
2498             iselInt128Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2500             addInstr(env, mk_iMOVsd_RR(sLo, hregAMD64_RAX()));
2585 //..             HReg rAmt, sHi, sLo, tHi, tLo, tTemp;
2590 //..             iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2593 //..             addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2628 //..             HReg rAmt, sHi, sLo, tHi, tLo, tTemp;
2633 //..             iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2636 //..             addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2753 //..             HReg sHi, sLo;
2754 //..             iselInt64Expr(&sHi, &sLo, env, e->Iex.Unop.arg);
2756 //..             addInstr(env, mk_iMOVsd_RR(sLo, tLo));