Lines Matching refs:vex_printf
225 vex_printf("ensureRRISpace: %d -> %d\n", *size, 2 * *size);
416 vex_printf("** "); \
418 vex_printf("\n\n"); \
427 vex_printf(" rreg_state[%2d] = ", z); \
429 vex_printf(" \t"); \
431 case Free: vex_printf("Free\n"); break; \
432 case Unavail: vex_printf("Unavail\n"); break; \
433 case Bound: vex_printf("BoundTo "); \
435 vex_printf("\n"); break; \
438 vex_printf("\n vreg_state[0 .. %d]:\n ", n_vregs-1); \
443 vex_printf("[%d] -> %d ", z, vreg_state[z]); \
446 vex_printf("\n "); \
448 vex_printf("\n"); \
537 vex_printf("\n%d stage1: ", ii);
539 vex_printf("\n");
554 vex_printf("\n");
556 vex_printf("\n");
557 vex_printf("vreg %d, n_vregs %d\n", k, n_vregs);
575 vex_printf("\n\nOFFENDING VREG = %d\n", k);
588 vex_printf("\n\nOFFENDING VREG = %d\n", k);
640 vex_printf("\nOFFENDING RREG = ");
642 vex_printf("\n");
643 vex_printf("\nOFFENDING instr = ");
645 vex_printf("\n");
653 vex_printf("\nOFFENDING RREG = ");
655 vex_printf("\n");
656 vex_printf("\nOFFENDING instr = ");
658 vex_printf("\n");
673 vex_printf("FLUSH 1 (%d,%d)\n", flush_la, flush_db);
694 vex_printf("residual %d: %d %d\n", j, rreg_live_after[j],
709 vex_printf("FLUSH 2 (%d,%d)\n",
741 vex_printf(" hinted\n");
767 vex_printf("vreg %d: la = %d, db = %d\n",
773 vex_printf("RRegLRs by LA:\n");
775 vex_printf(" ");
777 vex_printf(" la = %d, db = %d\n",
780 vex_printf("RRegLRs by DB:\n");
782 vex_printf(" ");
784 vex_printf(" la = %d, db = %d\n",
845 if (0) vex_printf("16-byte spill offset in spill slot %d\n", (Int)k);
879 vex_printf("\n\n");
881 vex_printf("vreg %d --> spill offset %d\n",
911 vex_printf("\n====----====---- Insn %d ----====----====\n", ii);
912 vex_printf("---- ");
914 vex_printf("\n\nInitial state:\n");
916 vex_printf("\n");
944 vex_printf("considering la %d .. db %d reg = ",
948 vex_printf("\n");
1039 vex_printf("COALESCE ");
1041 vex_printf(" -> ");
1043 vex_printf("\n\n");
1091 vex_printf("free up ");
1093 vex_printf("\n");
1132 vex_printf("need to free up rreg: ");
1134 vex_printf("\n\n");
1174 vex_printf("After pre-insn actions for fixed regs:\n");
1176 vex_printf("\n");
1241 vex_printf("[%3d] ", spilloff); ppHReg(cand); vex_printf(" ");
1250 vex_printf(" --> ");
1256 vex_printf("\n");
1273 vex_printf("considering "); (*ppReg)(vreg); vex_printf("\n");
1392 vex_printf("reg_alloc: can't find a register in class: ");
1394 vex_printf("\n");
1483 vex_printf("After dealing with current insn:\n");
1485 vex_printf("\n");
1518 vex_printf("After post-insn actions for fixed regs:\n");
1520 vex_printf("\n");
