Lines Matching refs:mode64
95 HReg hregPPC_GPR0 ( Bool mode64 ) { return MkHRegGPR( 0, mode64); }
96 HReg hregPPC_GPR1 ( Bool mode64 ) { return MkHRegGPR( 1, mode64); }
97 HReg hregPPC_GPR2 ( Bool mode64 ) { return MkHRegGPR( 2, mode64); }
98 HReg hregPPC_GPR3 ( Bool mode64 ) { return MkHRegGPR( 3, mode64); }
99 HReg hregPPC_GPR4 ( Bool mode64 ) { return MkHRegGPR( 4, mode64); }
100 HReg hregPPC_GPR5 ( Bool mode64 ) { return MkHRegGPR( 5, mode64); }
101 HReg hregPPC_GPR6 ( Bool mode64 ) { return MkHRegGPR( 6, mode64); }
102 HReg hregPPC_GPR7 ( Bool mode64 ) { return MkHRegGPR( 7, mode64); }
103 HReg hregPPC_GPR8 ( Bool mode64 ) { return MkHRegGPR( 8, mode64); }
104 HReg hregPPC_GPR9 ( Bool mode64 ) { return MkHRegGPR( 9, mode64); }
105 HReg hregPPC_GPR10 ( Bool mode64 ) { return MkHRegGPR(10, mode64); }
106 HReg hregPPC_GPR11 ( Bool mode64 ) { return MkHRegGPR(11, mode64); }
107 HReg hregPPC_GPR12 ( Bool mode64 ) { return MkHRegGPR(12, mode64); }
108 HReg hregPPC_GPR13 ( Bool mode64 ) { return MkHRegGPR(13, mode64); }
109 HReg hregPPC_GPR14 ( Bool mode64 ) { return MkHRegGPR(14, mode64); }
110 HReg hregPPC_GPR15 ( Bool mode64 ) { return MkHRegGPR(15, mode64); }
111 HReg hregPPC_GPR16 ( Bool mode64 ) { return MkHRegGPR(16, mode64); }
112 HReg hregPPC_GPR17 ( Bool mode64 ) { return MkHRegGPR(17, mode64); }
113 HReg hregPPC_GPR18 ( Bool mode64 ) { return MkHRegGPR(18, mode64); }
114 HReg hregPPC_GPR19 ( Bool mode64 ) { return MkHRegGPR(19, mode64); }
115 HReg hregPPC_GPR20 ( Bool mode64 ) { return MkHRegGPR(20, mode64); }
116 HReg hregPPC_GPR21 ( Bool mode64 ) { return MkHRegGPR(21, mode64); }
117 HReg hregPPC_GPR22 ( Bool mode64 ) { return MkHRegGPR(22, mode64); }
118 HReg hregPPC_GPR23 ( Bool mode64 ) { return MkHRegGPR(23, mode64); }
119 HReg hregPPC_GPR24 ( Bool mode64 ) { return MkHRegGPR(24, mode64); }
120 HReg hregPPC_GPR25 ( Bool mode64 ) { return MkHRegGPR(25, mode64); }
121 HReg hregPPC_GPR26 ( Bool mode64 ) { return MkHRegGPR(26, mode64); }
122 HReg hregPPC_GPR27 ( Bool mode64 ) { return MkHRegGPR(27, mode64); }
123 HReg hregPPC_GPR28 ( Bool mode64 ) { return MkHRegGPR(28, mode64); }
124 HReg hregPPC_GPR29 ( Bool mode64 ) { return MkHRegGPR(29, mode64); }
125 HReg hregPPC_GPR30 ( Bool mode64 ) { return MkHRegGPR(30, mode64); }
126 HReg hregPPC_GPR31 ( Bool mode64 ) { return MkHRegGPR(31, mode64); }
196 void getAllocableRegs_PPC ( Int* nregs, HReg** arr, Bool mode64 )
199 if (mode64)
207 (*arr)[i++] = hregPPC_GPR3(mode64);
208 (*arr)[i++] = hregPPC_GPR4(mode64);
209 (*arr)[i++] = hregPPC_GPR5(mode64);
210 (*arr)[i++] = hregPPC_GPR6(mode64);
211 (*arr)[i++] = hregPPC_GPR7(mode64);
212 (*arr)[i++] = hregPPC_GPR8(mode64);
213 (*arr)[i++] = hregPPC_GPR9(mode64);
214 (*arr)[i++] = hregPPC_GPR10(mode64);
215 if (!mode64) {
216 /* in mode64:
219 (*arr)[i++] = hregPPC_GPR11(mode64);
220 (*arr)[i++] = hregPPC_GPR12(mode64);
224 (*arr)[i++] = hregPPC_GPR14(mode64);
225 (*arr)[i++] = hregPPC_GPR15(mode64);
226 (*arr)[i++] = hregPPC_GPR16(mode64);
227 (*arr)[i++] = hregPPC_GPR17(mode64);
228 (*arr)[i++] = hregPPC_GPR18(mode64);
229 (*arr)[i++] = hregPPC_GPR19(mode64);
230 (*arr)[i++] = hregPPC_GPR20(mode64);
231 (*arr)[i++] = hregPPC_GPR21(mode64);
232 (*arr)[i++] = hregPPC_GPR22(mode64);
233 (*arr)[i++] = hregPPC_GPR23(mode64);
234 (*arr)[i++] = hregPPC_GPR24(mode64);
235 (*arr)[i++] = hregPPC_GPR25(mode64);
236 (*arr)[i++] = hregPPC_GPR26(mode64);
237 (*arr)[i++] = hregPPC_GPR27(mode64);
238 (*arr)[i++] = hregPPC_GPR28(mode64);
732 PPCInstr* PPCInstr_LI ( HReg dst, ULong imm64, Bool mode64 )
738 if (!mode64)
853 HReg dst, PPCAMode* src, Bool mode64 ) {
860 if (sz == 8) vassert(mode64);
864 HReg dst, HReg src, Bool mode64 )
872 if (sz == 8) vassert(mode64);
876 Bool mode64 ) {
883 if (sz == 8) vassert(mode64);
886 PPCInstr* PPCInstr_StoreC ( UChar sz, HReg dst, HReg src, Bool mode64 ) {
893 if (sz == 8) vassert(mode64);
1198 static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
1201 if (!mode64) {
1217 void ppPPCInstr ( PPCInstr* i, Bool mode64 )
1221 ppLoadImm(i->Pin.LI.dst, i->Pin.LI.imm64, mode64);
1324 ppLoadImm(hregPPC_GPR10(mode64), i->Pin.Call.target, mode64);
1350 ppLoadImm(hregPPC_GPR3(mode64), i->Pin.Goto.dst->Pri.Imm,
1351 mode64);
1353 ppMovReg(hregPPC_GPR3(mode64), i->Pin.Goto.dst->Pri.Reg);
1368 ppLoadImm(i->Pin.CMov.dst, i->Pin.CMov.src->Pri.Imm, mode64);
1574 ppLoadImm(hregPPC_GPR30(mode64),
1575 i->Pin.AvLdSt.addr->Pam.RR.index, mode64);
1722 void getRegUsage_PPCInstr ( HRegUsage* u, PPCInstr* i, Bool mode64 )
1769 mode64: r3 to r10
1775 addHRegUse(u, HRmWrite, hregPPC_GPR3(mode64));
1776 addHRegUse(u, HRmWrite, hregPPC_GPR4(mode64));
1777 addHRegUse(u, HRmWrite, hregPPC_GPR5(mode64));
1778 addHRegUse(u, HRmWrite, hregPPC_GPR6(mode64));
1779 addHRegUse(u, HRmWrite, hregPPC_GPR7(mode64));
1780 addHRegUse(u, HRmWrite, hregPPC_GPR8(mode64));
1781 addHRegUse(u, HRmWrite, hregPPC_GPR9(mode64));
1782 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
1783 if (!mode64) {
1784 addHRegUse(u, HRmWrite, hregPPC_GPR11(mode64));
1785 addHRegUse(u, HRmWrite, hregPPC_GPR12(mode64));
1791 if (argir &(1<<10)) addHRegUse(u, HRmRead, hregPPC_GPR10(mode64));
1792 if (argir & (1<<9)) addHRegUse(u, HRmRead, hregPPC_GPR9(mode64));
1793 if (argir & (1<<8)) addHRegUse(u, HRmRead, hregPPC_GPR8(mode64));
1794 if (argir & (1<<7)) addHRegUse(u, HRmRead, hregPPC_GPR7(mode64));
1795 if (argir & (1<<6)) addHRegUse(u, HRmRead, hregPPC_GPR6(mode64));
1796 if (argir & (1<<5)) addHRegUse(u, HRmRead, hregPPC_GPR5(mode64));
1797 if (argir & (1<<4)) addHRegUse(u, HRmRead, hregPPC_GPR4(mode64));
1798 if (argir & (1<<3)) addHRegUse(u, HRmRead, hregPPC_GPR3(mode64));
1807 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
1815 addHRegUse(u, HRmWrite, hregPPC_GPR3(mode64));
1822 addHRegUse(u, HRmWrite, GuestStatePtr(mode64));
1907 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
1983 ppPPCInstr(i, mode64);
1994 void mapRegs_PPCInstr ( HRegRemap* m, PPCInstr* i, Bool mode64 )
2179 ppPPCInstr(i, mode64);
2220 HReg rreg, Int offsetB, Bool mode64 )
2225 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
2228 vassert(mode64);
2229 *i1 = PPCInstr_Store( 8, am, rreg, mode64 );
2232 vassert(!mode64);
2233 *i1 = PPCInstr_Store( 4, am, rreg, mode64 );
2250 HReg rreg, Int offsetB, Bool mode64 )
2255 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
2258 vassert(mode64);
2259 *i1 = PPCInstr_Load( 8, rreg, am, mode64 );
2262 vassert(!mode64);
2263 *i1 = PPCInstr_Load( 4, rreg, am, mode64 );
2281 static UInt iregNo ( HReg r, Bool mode64 )
2284 vassert(hregClass(r) == mode64 ? HRcInt64 : HRcInt32);
2513 PPCAMode* am, Bool mode64 )
2519 rA = iregNo(am->Pam.IR.base, mode64);
2522 if (opc1 == 58 || opc1 == 62) { // ld/std: mode64 only
2523 vassert(mode64);
2533 UInt rSD, PPCAMode* am, Bool mode64 )
2538 rA = iregNo(am->Pam.RR.base, mode64);
2539 rB = iregNo(am->Pam.RR.index, mode64);
2547 static UChar* mkLoadImm ( UChar* p, UInt r_dst, ULong imm, Bool mode64 )
2551 if (!mode64) {
2576 vassert(mode64);
2671 Bool mode64,
2679 vex_printf("asm ");ppPPCInstr(i, mode64); vex_printf("\n");
2685 p = mkLoadImm(p, iregNo(i->Pin.LI.dst, mode64),
2686 i->Pin.LI.imm64, mode64);
2692 UInt r_dst = iregNo(i->Pin.Alu.dst, mode64);
2693 UInt r_srcL = iregNo(i->Pin.Alu.srcL, mode64);
2695 iregNo(srcR->Prh.Reg.reg, mode64);
2765 UInt r_dst = iregNo(i->Pin.Shft.dst, mode64);
2766 UInt r_srcL = iregNo(i->Pin.Shft.srcL, mode64);
2768 iregNo(srcR->Prh.Reg.reg, mode64);
2769 if (!mode64)
2846 if (mode64)
2878 UInt r_srcL = iregNo(i->Pin.AddSubC.srcL, mode64);
2879 UInt r_srcR = iregNo(i->Pin.AddSubC.srcR, mode64);
2880 UInt r_dst = iregNo(i->Pin.AddSubC.dst, mode64);
2901 UInt r_srcL = iregNo(i->Pin.Cmp.srcL, mode64);
2905 if (!mode64) // cmp double word invalid for mode32
2907 else if (!sz32) // mode64 && cmp64: set L=1
2922 r_srcR = iregNo(srcR->Prh.Reg.reg, mode64);
2935 UInt r_dst = iregNo(i->Pin.Unary.dst, mode64);
2936 UInt r_src = iregNo(i->Pin.Unary.src, mode64);
2949 vassert(mode64);
2953 vassert(mode64);
2964 UInt r_dst = iregNo(i->Pin.MulL.dst, mode64);
2965 UInt r_srcL = iregNo(i->Pin.MulL.srcL, mode64);
2966 UInt r_srcR = iregNo(i->Pin.MulL.srcR, mode64);
2968 if (!mode64)
2998 UInt r_dst = iregNo(i->Pin.Div.dst, mode64);
2999 UInt r_srcL = iregNo(i->Pin.Div.srcL, mode64);
3000 UInt r_srcR = iregNo(i->Pin.Div.srcR, mode64);
3002 if (!mode64)
3051 p = mkLoadImm(p, r_dst, i->Pin.Call.target, mode64);
3123 p = mkLoadImm(p, r_ret, imm_dst, mode64); // p += 4|8|20
3126 r_dst = iregNo(i->Pin.Goto.dst->Pri.Reg, mode64);
3150 r_dst = iregNo(i->Pin.CMov.dst, mode64);
3165 p = mkLoadImm(p, r_dst, imm_src, mode64); // p += 4|8|20
3168 r_src = iregNo(i->Pin.CMov.src->Pri.Reg, mode64);
3187 UInt r_dst = iregNo(i->Pin.Load.dst, mode64);
3191 if (mode64 && (sz == 4 || sz == 8)) {
3199 case 8: opc1 = 58; vassert(mode64); break;
3202 p = doAMode_IR(p, opc1, r_dst, am_addr, mode64);
3209 case 8: opc2 = 21; vassert(mode64); break;
3212 p = doAMode_RR(p, 31, opc2, r_dst, am_addr, mode64);
3221 p = mkFormX(p, 31, iregNo(i->Pin.LoadL.dst, mode64),
3222 0, iregNo(i->Pin.LoadL.src, mode64), 20, 0);
3225 if (i->Pin.LoadL.sz == 8 && mode64) {
3226 p = mkFormX(p, 31, iregNo(i->Pin.LoadL.dst, mode64),
3227 0, iregNo(i->Pin.LoadL.src, mode64), 84, 0);
3236 UInt r_dst = iregNo(i->Pin.Set.dst, mode64);
3265 p = mkFormX(p, 31, iregNo(i->Pin.MfCR.dst, mode64), 0, 0, 19, 0);
3277 UInt r_src = iregNo(i->Pin.Store.src, mode64);
3281 if (mode64 && (sz == 4 || sz == 8)) {
3289 case 8: vassert(mode64);
3294 p = doAMode_IR(p, opc1, r_src, am_addr, mode64);
3301 case 8: vassert(mode64);
3306 p = doAMode_RR(p, 31, opc2, r_src, am_addr, mode64);
3316 p = mkFormX(p, 31, iregNo(i->Pin.StoreC.src, mode64),
3317 0, iregNo(i->Pin.StoreC.dst, mode64), 150, 1);
3320 if (i->Pin.StoreC.sz == 8 && mode64) {
3321 p = mkFormX(p, 31, iregNo(i->Pin.StoreC.src, mode64),
3322 0, iregNo(i->Pin.StoreC.dst, mode64), 214, 1);
3438 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64);
3441 p = doAMode_IR(p, opc, f_reg, am_addr, mode64);
3446 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64);
3449 p = doAMode_IR(p, opc, f_reg, am_addr, mode64);
3456 UInt ir_addr = iregNo(i->Pin.FpSTFIW.addr, mode64);
3543 UInt r_dst = iregNo(i->Pin.FpCmp.dst, mode64);
3560 UInt reg = iregNo(i->Pin.RdWrLR.gpr, mode64);
3575 r_base = iregNo(i->Pin.AvLdSt.addr->Pam.RR.base, mode64);
3581 i->Pin.AvLdSt.addr->Pam.IR.index, mode64);
3583 r_idx = iregNo(i->Pin.AvLdSt.addr->Pam.RR.index, mode64);
3960 ppPPCInstr(i, mode64);
