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Lines Matching refs:mode64

60   GPR11      if mode64: not used - calls by ptr / env ptr for some langs
61 GPR12 if mode64: not used - exceptions / global linkage code
69 if (mode64)
84 if (mode64)
270 Bool mode64;
289 vassert(!env->mode64);
301 ppPPCInstr(instr, env->mode64);
308 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64),
437 HReg sp = StackFramePtr(env->mode64);
445 HReg sp = StackFramePtr(env->mode64);
461 addInstr(env, mk_iMOVds_RR(r, StackFramePtr(env->mode64)));
467 PPCInstr_LI(align16, 0xFFFFFFFFFFFFFFF0ULL, env->mode64));
481 vassert(!env->mode64);
486 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
487 am_addr1 = PPCAMode_IR( 4, StackFramePtr(env->mode64) );
490 addInstr(env, PPCInstr_Store( 4, am_addr0, r_srcHi, env->mode64 ));
491 addInstr(env, PPCInstr_Store( 4, am_addr1, r_srcLo, env->mode64 ));
506 vassert(env->mode64);
510 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
513 addInstr(env, PPCInstr_Store( 8, am_addr0, r_src, env->mode64 ));
588 env->mode64 ? False : True/*F:64-bit, T:32-bit shift*/,
596 PPCAMode_RR( GuestStatePtr(env->mode64), rtmp );
637 Bool mode64 = env->mode64;
642 = (!mode64) && env->vbi->host_ppc32_regalign_int64_args;
652 (mode32:32 | mode64:64) integer bits in total can be passed.
653 In fact the only supported arg type is (mode32:I32 | mode64:I64).
703 argregs[0] = hregPPC_GPR3(mode64);
704 argregs[1] = hregPPC_GPR4(mode64);
705 argregs[2] = hregPPC_GPR5(mode64);
706 argregs[3] = hregPPC_GPR6(mode64);
707 argregs[4] = hregPPC_GPR7(mode64);
708 argregs[5] = hregPPC_GPR8(mode64);
709 argregs[6] = hregPPC_GPR9(mode64);
710 argregs[7] = hregPPC_GPR10(mode64);
753 GuestStatePtr(mode64) ));
761 if (!mode64) {
779 } else { // mode64
800 GuestStatePtr(mode64) ));
808 if (!mode64) {
821 } else { // mode64
854 target = mode64 ? Ptr_to_ULong(cee->addr) :
878 // addInstr(env, PPCInstr_LI(r_src, 0x0, env->mode64));
879 // if (env->mode64) {
901 vassert(hregClass(r_rmIR) == HRcGPR(env->mode64));
976 if (env->mode64) {
1063 addInstr(env, PPCInstr_LI(r_src, (Long)simm32, env->mode64));
1084 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, env->mode64 ));
1136 All results are returned in a (mode64 ? 64bit : 32bit) register.
1150 vassert(hregClass(r) == HRcGPR(env->mode64));
1158 Bool mode64 = env->mode64;
1164 ty == Ity_I32 || ((ty == Ity_I64) && mode64));
1181 r_dst, am_addr, mode64 ));
1248 if (!mode64)
1275 vassert(mode64);
1312 vassert(mode64);
1340 if (mode64
1383 vassert(mode64);
1409 vassert(mode64);
1413 addInstr(env, PPCInstr_LI(msk, 0xFFFFFFFF, mode64));
1482 /* This works in both mode64 and mode32. */
1483 HReg r1 = StackFramePtr(env->mode64);
1499 addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
1502 if (mode64)
1513 if (mode64) {
1514 HReg r1 = StackFramePtr(env->mode64);
1529 addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/));
1567 addInstr(env, PPCInstr_Load(2,r_dst,amode, mode64));
1589 vassert(mode64);
1617 vassert(mode64);
1629 vassert(mode64);
1641 if (op_unop == Iop_Not64) vassert(mode64);
1648 if (!mode64) {
1662 if (!mode64) {
1672 if (mode64) { /* This is a no-op. */
1688 if (mode64) {
1695 if (mode64) {
1724 if (mode64) {
1741 if (op_unop == Iop_Clz64 && !mode64)
1754 if (op_unop == Iop_Left64 && !mode64)
1776 if (!mode64) goto irreducible;
1800 PPCInstr_Load( 4, dst, am_off12, mode64 ));
1808 if (mode64) {
1827 mode64 ));
1844 if (mode64) {
1850 am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
1856 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
1874 am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
1880 addInstr(env, PPCInstr_Load( 4, r_dst, am_addr, mode64 ));
1895 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
1898 GuestStatePtr(mode64) );
1900 r_dst, am_addr, mode64 ));
1911 if (mode64 && ty == Ity_I64) {
1913 r_dst, src_am, mode64 ));
1916 if ((!mode64) && ty == Ity_I32) {
1918 r_dst, src_am, mode64 ));
1939 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
1950 case Ico_U64: if (!mode64) goto irreducible;
1957 addInstr(env, PPCInstr_LI(r_dst, (ULong)l, mode64));
1964 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) &&
2031 Bool mode64 = env->mode64;
2036 return toBool( hregClass(am->Pam.IR.base) == HRcGPR(mode64) &&
2040 return toBool( hregClass(am->Pam.RR.base) == HRcGPR(mode64) &&
2042 hregClass(am->Pam.RR.index) == HRcGPR(mode64) &&
2062 if (env->mode64) {
2148 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2163 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2171 case Ico_U64: vassert(env->mode64);
2208 vassert(hregClass(ri->Pri.Reg) == HRcGPR(env->mode64));
2222 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2228 case Ico_U64: vassert(env->mode64);
2252 vassert(!env->mode64);
2261 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2297 vassert(env->mode64);
2306 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2355 addInstr(env, PPCInstr_LI(r_zero, 0, env->mode64));
2443 if (!env->mode64) {
2451 } else { // mode64
2473 vassert(env->mode64);
2518 vassert(env->mode64);
2523 vassert(hregClass(*rHi) == HRcGPR(env->mode64));
2525 vassert(hregClass(*rLo) == HRcGPR(env->mode64));
2603 vassert(!env->mode64);
2626 vassert(!env->mode64);
2767 HReg r1 = StackFramePtr(env->mode64);
2773 vassert(!env->mode64);
2828 vassert(env->mode64 == False);
2829 addInstr(env, PPCInstr_LI(zero32, 0, env->mode64));
2986 Bool mode64 = env->mode64;
3007 GuestStatePtr(env->mode64) );
3043 PPCAMode* zero_r1 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3057 if (mode64) {
3060 HReg r1 = StackFramePtr(env->mode64);
3068 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3083 HReg r1 = StackFramePtr(env->mode64);
3157 Bool mode64 = env->mode64;
3183 if (!mode64) {
3186 addInstr(env, PPCInstr_LI(r_srcHi, u.u32x2[0], mode64));
3187 addInstr(env, PPCInstr_LI(r_srcLo, u.u32x2[1], mode64));
3189 } else { // mode64
3191 addInstr(env, PPCInstr_LI(r_src, u.u64, mode64));
3210 GuestStatePtr(mode64) );
3287 if (mode64) {
3290 HReg r1 = StackFramePtr(env->mode64);
3298 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3314 HReg r1 = StackFramePtr(env->mode64);
3368 if (!mode64) {
3388 am_addr = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3391 addInstr(env, PPCInstr_Store( 4, am_addr, src, env->mode64 ));
3455 Bool mode64 = env->mode64;
3473 GuestStatePtr(mode64) )));
3560 addInstr(env, PPCInstr_LI(r_zeros, 0x0, mode64));
3561 addInstr(env, PPCInstr_Store( 4, am_off0, r_zeros, mode64 ));
3562 addInstr(env, PPCInstr_Store( 4, am_off4, r_zeros, mode64 ));
3563 addInstr(env, PPCInstr_Store( 4, am_off8, r_zeros, mode64 ));
3566 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, mode64 ));
3589 if (!mode64) {
3605 addInstr(env, PPCInstr_Store( 4, am_off12, r0, mode64 ));
3606 addInstr(env, PPCInstr_Store( 4, am_off8, r1, mode64 ));
3609 addInstr(env, PPCInstr_Store( 4, am_off4, r2, mode64 ));
3610 addInstr(env, PPCInstr_Store( 4, am_off0, r3, mode64 ));
3632 addInstr(env, PPCInstr_Store( 8, am_off0, rHi, mode64 ));
3633 addInstr(env, PPCInstr_Store( 8, am_off8, rLo, mode64 ));
3857 LibVEX_ppVexHwCaps(mode64 ? VexArchPPC64 : VexArchPPC32,
3870 Bool mode64 = env->mode64;
3887 if (!mode64 && (tya != Ity_I32))
3889 if (mode64 && (tya != Ity_I64))
3893 (mode64 && (tyd == Ity_I64))) {
3898 am_addr, r_src, mode64 ));
3925 if (tyd == Ity_I64 && !mode64) {
3949 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
3952 GuestStatePtr(mode64) );
3954 am_addr, r_src, mode64 ));
3957 if (!mode64 && ty == Ity_I64) {
3960 GuestStatePtr(mode64) );
3963 addInstr(env, PPCInstr_Store( 4, am_addr, rHi, mode64 ));
3964 addInstr(env, PPCInstr_Store( 4, am_addr4, rLo, mode64 ));
3972 GuestStatePtr(mode64) );
3980 GuestStatePtr(mode64) );
3995 if (mode64 && ty == Ity_I64) {
3998 dst_am, r_src, mode64 ));
4001 if ((!mode64) && ty == Ity_I32) {
4004 dst_am, r_src, mode64 ));
4015 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
4021 if (!mode64 && ty == Ity_I64) {
4029 if (mode64 && ty == Ity_I128) {
4072 if (!mode64 && (tyAddr != Ity_I32))
4074 if (mode64 && (tyAddr != Ity_I64))
4082 addInstr(env, PPCInstr_LoadL( 4, r_dst, r_addr, mode64 ));
4085 if (tyRes == Ity_I64 && mode64) {
4086 addInstr(env, PPCInstr_LoadL( 8, r_dst, r_addr, mode64 ));
4099 if (tyData == Ity_I32 || (tyData == Ity_I64 && mode64)) {
4101 r_a, r_src, mode64 ));
4105 env->mode64 ? False : True
4144 if (!mode64 && retty == Ity_I64) {
4149 addInstr(env, mk_iMOVds_RR(r_dstHi, hregPPC_GPR3(mode64)));
4150 addInstr(env, mk_iMOVds_RR(r_dstLo, hregPPC_GPR4(mode64)));
4154 retty == Ity_I32 || ((retty == Ity_I64) && mode64)) {
4158 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
4196 if (!mode64 && (tag != Ico_U32))
4198 if (mode64 && (tag != Ico_U64))
4251 Bool mode64 = False;
4255 mode64 = arch_host == VexArchPPC64;
4264 if (mode64) {
4275 env->mode64 = mode64;
4304 if (mode64) { hreg = mkHReg(j++, HRcInt64, True); break;
4308 if (mode64) { hreg = mkHReg(j++, HRcInt64, True); break;
4312 case Ity_I128: vassert(mode64);