Lines Matching full:set1
279 UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1);
284 if (set1 == set2)
285 return cachesim_setref(c, set1, tag);
288 /* Nb: this is a fast way of doing ((set1+1) % c->sets) */
289 else if (((set1 + 1) & (c->sets_min_1)) == set2) {
293 CacheResult res1 = cachesim_setref(c, set1, tag);
298 VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
383 UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1);
388 if (set1 == set2)
389 return cachesim_setref_wb(c, ref, set1, tag);
392 /* Nb: this is a fast way of doing ((set1+1) % c->sets) */
393 else if (((set1 + 1) & (c->sets_min_1)) == set2) {
397 CacheResult res1 = cachesim_setref_wb(c, ref, set1, tag);
404 VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
677 UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \
686 L.name, a, size, set1, set2); \
689 if (set1 == set2) { \
691 set = &(L.tags[set1 * L.assoc]); \
699 idx = (set1 * L.assoc) + (set[0] & ~L.tag_mask); \
716 idx = (set1 * L.assoc) + (tmp_tag & ~L.tag_mask); \
732 idx = (set1 * L.assoc) + tmp_tag; \
737 /* Nb: this is a fast way of doing ((set1+1) % L.sets) */ \
738 } else if (((set1 + 1) & (L.sets_min_1)) == set2) { \
740 set = &(L.tags[set1 * L.assoc]); \
743 idx = (set1 * L.assoc) + (set[0] & ~L.tag_mask); \
758 idx = (set1 * L.assoc) + (tmp_tag & ~L.tag_mask); \
772 idx = (set1 * L.assoc) + tmp_tag; \
815 VG_(printf)("addr: %#lx size: %u sets: %d %d", a, size, set1, set2); \
