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Lines Matching refs:fpRegT1

859     emitLoadDouble(op, fpRegT1);
860     addDouble(fpRegT1, fpRegT0);
968     emitLoadDouble(op, fpRegT1);
969     subDouble(fpRegT0, fpRegT1);
970     emitStoreDouble(dst, fpRegT1);
1053                 emitLoadDouble(op1, fpRegT1);
1054                 subDouble(fpRegT0, fpRegT1);
1055                 emitStoreDouble(dst, fpRegT1);
1058                 emitLoadDouble(op1, fpRegT1);
1059                 divDouble(fpRegT0, fpRegT1);
1060                 emitStoreDouble(dst, fpRegT1);
1124                 emitLoadDouble(op2, fpRegT1);
1125                 addJump(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT1, fpRegT0), dst);
1128                 emitLoadDouble(op2, fpRegT1);
1129                 addJump(branchDouble(DoubleLessThan, fpRegT0, fpRegT1), dst);
1132                 emitLoadDouble(op2, fpRegT1);
1133                 addJump(branchDouble(DoubleLessThanOrUnordered, fpRegT1, fpRegT0), dst);
1136                 emitLoadDouble(op2, fpRegT1);
1137                 addJump(branchDouble(DoubleLessThanOrEqual, fpRegT0, fpRegT1), dst);
1247     convertInt32ToDouble(regT2, fpRegT1);
1248     divDouble(fpRegT1, fpRegT0);
1251     branchConvertDoubleToInt32(fpRegT0, regT0, doubleResult, fpRegT1);