Lines Matching refs:reg
207 MOV(AL, 0, parts.count.reg,
208 reg_imm(parts.count.reg, ROR, GGL_DITHER_ORDER_SHIFT));
209 ADD(AL, 0, parts.count.reg, parts.count.reg,
211 MOV(AL, 0, parts.count.reg,
212 reg_imm(parts.count.reg, ROR, 32 - GGL_DITHER_ORDER_SHIFT));
262 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask));
263 ADD(AL, 0, parts.dither.reg, parts.dither.reg, ctxtReg);
264 LDRB(AL, parts.dither.reg, parts.dither.reg,
289 if (pixel.reg == -1) {
321 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16));
336 ADD(AL, 0, parts.cbPtr.reg, parts.cbPtr.reg, imm(parts.cbPtr.size>>3));
338 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16));
360 CONTEXT_LOAD(parts.count.reg, iterators.xr);
364 SUB(AL, 0, parts.count.reg, parts.count.reg, Rx);
365 SUB(AL, 0, parts.count.reg, parts.count.reg, imm(1));
368 // parts.count.reg = 0xNNNNXXDD
378 ORR(AL, 0, parts.count.reg, tx, reg_imm(parts.count.reg, LSL, 16));
380 // parts.count.reg = 0xNNNN0000
382 MOV(AL, 0, parts.count.reg, reg_imm(parts.count.reg, LSL, 16));
392 CONTEXT_LOAD(parts.cbPtr.reg, state.buffers.color.data);
418 int ydzdy = parts.z.reg;
421 MLA(AL, 0, parts.z.reg, Rx, dzdx, ydzdy);
430 ADD(AL, 0, Rs, Rs, reg_imm(parts.count.reg, LSR, 16));
445 CONTEXT_LOAD(parts.covPtr.reg, state.buffers.coverage);
446 ADD(AL, 0, parts.covPtr.reg, parts.covPtr.reg, reg_imm(Rx, LSL, 1));
553 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSR, incoming.l));
569 mAlphaSource.setTo(fragment.reg,
572 MOV(AL, 0, mAlphaSource.reg,
573 reg_imm(mAlphaSource.reg, LSR, shift));
581 MOV(AL, 0, mAlphaSource.reg,
582 reg_imm(fragment.reg, LSR, shift));
584 MOV(AL, 0, mAlphaSource.reg, fragment.reg);
638 int c = parts.argb[i].reg;
639 int dx = parts.argb_dx[i].reg;
680 LDRH(AL, cf, parts.covPtr.reg, immed8_post(2));
683 SMULWB(AL, fragment.reg, incoming.reg, cf);
685 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSL, 1));
686 SMULWB(AL, fragment.reg, fragment.reg, cf);
702 if (shift) CMP(AL, fragment.reg, reg_imm(ref, LSR, shift));
703 else CMP(AL, fragment.reg, ref);
763 int z = parts.z.reg;
766 SUB(AL, 0, zbase, zbase, reg_imm(parts.count.reg, LSR, 15));
792 ADD(AL, 0, parts.z.reg, parts.z.reg, dzdx);
823 pixel.reg = regs.obtain();
829 case GGL_CLEAR: MOV(AL, 0, pixel.reg, imm(0)); break;
830 case GGL_AND: AND(AL, 0, pixel.reg, s.reg, d.reg); break;
831 case GGL_AND_REVERSE: BIC(AL, 0, pixel.reg, s.reg, d.reg); break;
833 case GGL_AND_INVERTED: BIC(AL, 0, pixel.reg, d.reg, s.reg); break;
834 case GGL_NOOP: MOV(AL, 0, pixel.reg, d.reg); break;
835 case GGL_XOR: EOR(AL, 0, pixel.reg, s.reg, d.reg); break;
836 case GGL_OR: ORR(AL, 0, pixel.reg, s.reg, d.reg); break;
837 case GGL_NOR: ORR(AL, 0, pixel.reg, s.reg, d.reg);
838 MVN(AL, 0, pixel.reg, pixel.reg); break;
839 case GGL_EQUIV: EOR(AL, 0, pixel.reg, s.reg, d.reg);
840 MVN(AL, 0, pixel.reg, pixel.reg); break;
841 case GGL_INVERT: MVN(AL, 0, pixel.reg, d.reg); break;
843 BIC(AL, 0, pixel.reg, d.reg, s.reg);
844 MVN(AL, 0, pixel.reg, pixel.reg); break;
845 case GGL_COPY_INVERTED: MVN(AL, 0, pixel.reg, s.reg); break;
847 BIC(AL, 0, pixel.reg, s.reg, d.reg);
848 MVN(AL, 0, pixel.reg, pixel.reg); break;
849 case GGL_NAND: AND(AL, 0, pixel.reg, s.reg, d.reg);
850 MVN(AL, 0, pixel.reg, pixel.reg); break;
851 case GGL_SET: MVN(AL, 0, pixel.reg, imm(0)); break;
930 pixel.reg = regs.obtain();
953 build_and_immediate(pixel.reg, s.reg, mask, fb.size());
959 build_and_immediate(fb.reg, fb.reg, ~mask, fb.size());
962 if (s.reg == fb.reg) {
964 if (s.reg == pixel.reg) {
967 MOV(AL, 0, pixel.reg, fb.reg);
970 ORR(AL, 0, pixel.reg, s.reg, fb.reg);
981 ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 2));
984 if (d.reg == b.reg) {
985 ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 1));
986 ADD(AL, 0, d.reg, d.reg, o.reg);
988 ADD(AL, 0, d.reg, o.reg, reg_imm(o.reg, LSL, 1));
989 ADD(AL, 0, d.reg, d.reg, b.reg);
993 ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 1));
996 ADD(AL, 0, d.reg, b.reg, o.reg);
1010 int RegisterAllocator::reserveReg(int reg)
1012 return mRegs.reserve(reg);
1020 void RegisterAllocator::recycleReg(int reg)
1022 mRegs.recycle(reg);
1060 int RegisterAllocator::RegisterFile::reserve(int reg)
1062 LOG_ALWAYS_FATAL_IF(isUsed(reg),
1064 reg);
1065 mRegs |= (1<<reg);
1067 return reg;
1076 int RegisterAllocator::RegisterFile::isUsed(int reg) const
1078 LOG_ALWAYS_FATAL_IF(reg>=16, "invalid register %d", reg);
1079 return mRegs & (1<<reg);
1125 void RegisterAllocator::RegisterFile::recycle(int reg)
1127 LOG_FATAL_IF(!isUsed(reg),
1129 reg);
1130 mRegs &= ~(1<<reg);
