1 ///////////////////////////////////////////////////////////////////////// 2 // $Id$ 3 ///////////////////////////////////////////////////////////////////////// 4 // 5 // 32 bit Bochs BIOS init code 6 // Copyright (C) 2006 Fabrice Bellard 7 // 8 // This library is free software; you can redistribute it and/or 9 // modify it under the terms of the GNU Lesser General Public 10 // License as published by the Free Software Foundation; either 11 // version 2 of the License, or (at your option) any later version. 12 // 13 // This library is distributed in the hope that it will be useful, 14 // but WITHOUT ANY WARRANTY; without even the implied warranty of 15 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 // Lesser General Public License for more details. 17 // 18 // You should have received a copy of the GNU Lesser General Public 19 // License along with this library; if not, write to the Free Software 20 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 21 #include "rombios.h" 22 23 .globl _start 24 .globl smp_ap_boot_code_start 25 .globl smp_ap_boot_code_end 26 .global smm_relocation_start 27 .global smm_relocation_end 28 .global smm_code_start 29 .global smm_code_end 30 31 _start: 32 /* clear bss section */ 33 xor %eax, %eax 34 mov $__bss_start, %edi 35 mov $__bss_end, %ecx 36 sub %edi, %ecx 37 rep stosb 38 39 /* copy data section */ 40 mov $_end, %esi 41 mov $__data_start, %edi 42 mov $__data_end, %ecx 43 sub %edi, %ecx 44 rep movsb 45 46 jmp rombios32_init 47 48 .code16 49 smp_ap_boot_code_start: 50 cli 51 xor %ax, %ax 52 mov %ax, %ds 53 54 mov $SMP_MSR_ADDR, %ebx 55 11: 56 mov 0(%ebx), %ecx 57 test %ecx, %ecx 58 jz 12f 59 mov 4(%ebx), %eax 60 mov 8(%ebx), %edx 61 wrmsr 62 add $12, %ebx 63 jmp 11b 64 12: 65 66 lock incw smp_cpus 67 1: 68 hlt 69 jmp 1b 70 smp_ap_boot_code_end: 71 72 /* code to relocate SMBASE to 0xa0000 */ 73 smm_relocation_start: 74 mov $0x38000 + 0x7efc, %ebx 75 addr32 mov (%ebx), %al /* revision ID to see if x86_64 or x86 */ 76 cmp $0x64, %al 77 je 1f 78 mov $0x38000 + 0x7ef8, %ebx 79 jmp 2f 80 1: 81 mov $0x38000 + 0x7f00, %ebx 82 2: 83 movl $0xa0000, %eax 84 addr32 movl %eax, (%ebx) 85 /* indicate to the BIOS that the SMM code was executed */ 86 mov $0x00, %al 87 movw $0xb3, %dx 88 outb %al, %dx 89 rsm 90 smm_relocation_end: 91 92 /* minimal SMM code to enable or disable ACPI */ 93 smm_code_start: 94 movw $0xb2, %dx 95 inb %dx, %al 96 cmp $0xf0, %al 97 jne 1f 98 99 /* ACPI disable */ 100 mov $PM_IO_BASE + 0x04, %dx /* PMCNTRL */ 101 inw %dx, %ax 102 andw $~1, %ax 103 outw %ax, %dx 104 105 jmp 2f 106 107 1: 108 cmp $0xf1, %al 109 jne 2f 110 111 /* ACPI enable */ 112 mov $PM_IO_BASE + 0x04, %dx /* PMCNTRL */ 113 inw %dx, %ax 114 orw $1, %ax 115 outw %ax, %dx 116 117 2: 118 rsm 119 smm_code_end: 120