1 2 /*--------------------------------------------------------------------*/ 3 /*--- begin guest_generic_bb_to_IR.h ---*/ 4 /*--------------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2011 OpenWorks LLP 11 info (at) open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34 */ 35 36 #ifndef __VEX_GUEST_GENERIC_BB_TO_IR_H 37 #define __VEX_GUEST_GENERIC_BB_TO_IR_H 38 39 40 /* This defines stuff needed by the guest insn disassemblers. 41 It's a bit circular; is imported by 42 - the guest-specific toIR.c files (guest-{x86,amd64,ppc,arm}/toIR.c) 43 - the generic disassembly driver (bb_to_IR.c) 44 - vex_main.c 45 */ 46 47 48 /* --------------------------------------------------------------- 49 Result of disassembling an instruction 50 --------------------------------------------------------------- */ 51 52 /* The results of disassembling an instruction. There are three 53 possible outcomes. For Dis_Resteer, the disassembler _must_ 54 continue at the specified address. For Dis_StopHere, the 55 disassembler _must_ terminate the BB. For Dis_Continue, we may at 56 our option either disassemble the next insn, or terminate the BB; 57 but in the latter case we must set the bb's ->next field to point 58 to the next instruction. */ 59 60 typedef 61 62 struct { 63 64 /* The disassembled insn has this length. Must always be 65 set. */ 66 Int len; 67 68 /* What happens next? 69 Dis_StopHere: this insn terminates the BB; we must stop. 70 Dis_Continue: we can optionally continue into the next insn 71 Dis_ResteerU: followed an unconditional branch; continue at 72 'continueAt' 73 Dis_ResteerC: (speculatively, of course) followed a 74 conditional branch; continue at 'continueAt' 75 */ 76 enum { Dis_StopHere, Dis_Continue, 77 Dis_ResteerU, Dis_ResteerC } whatNext; 78 79 /* For Dis_Resteer, this is the guest address we should continue 80 at. Otherwise ignored (should be zero). */ 81 Addr64 continueAt; 82 83 } 84 85 DisResult; 86 87 88 /* --------------------------------------------------------------- 89 The type of a function which disassembles one instruction. 90 C's function-type syntax is really astonishing bizarre. 91 --------------------------------------------------------------- */ 92 93 /* A function of this type (DisOneInstrFn) disassembles an instruction 94 located at host address &guest_code[delta], whose guest IP is 95 guest_IP (this may be entirely unrelated to where the insn is 96 actually located in the host's address space.). The returned 97 DisResult.len field carries its size. If the returned 98 DisResult.whatNext field is Dis_Resteer then DisResult.continueAt 99 should hold the guest IP of the next insn to disassemble. 100 101 disInstr is not permitted to return Dis_Resteer if resteerOkFn, 102 when applied to the address which it wishes to resteer into, 103 returns False. 104 105 The resulting IR is added to the end of irbb. 106 */ 107 108 typedef 109 110 DisResult (*DisOneInstrFn) ( 111 112 /* This is the IRSB to which the resulting IR is to be appended. */ 113 /*OUT*/ IRSB* irbb, 114 115 /* Do we need to generate IR to set the guest IP for this insn, 116 or not? */ 117 /*IN*/ Bool put_IP, 118 119 /* Return True iff resteering to the given addr is allowed (for 120 branches/calls to destinations that are known at JIT-time) */ 121 /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ), 122 123 /* Should we speculatively resteer across conditional branches? 124 (Experimental and not enabled by default). The strategy is 125 to assume that backward branches are taken and forward 126 branches are not taken. */ 127 /*IN*/ Bool resteerCisOk, 128 129 /* Vex-opaque data passed to all caller (valgrind) supplied 130 callbacks. */ 131 /*IN*/ void* callback_opaque, 132 133 /* Where is the guest code? */ 134 /*IN*/ UChar* guest_code, 135 136 /* Where is the actual insn? Note: it's at &guest_code[delta] */ 137 /*IN*/ Long delta, 138 139 /* What is the guest IP of the insn? */ 140 /*IN*/ Addr64 guest_IP, 141 142 /* Info about the guest architecture */ 143 /*IN*/ VexArch guest_arch, 144 /*IN*/ VexArchInfo* archinfo, 145 146 /* ABI info for both guest and host */ 147 /*IN*/ VexAbiInfo* abiinfo, 148 149 /* Is the host bigendian? */ 150 /*IN*/ Bool host_bigendian 151 152 ); 153 154 155 /* --------------------------------------------------------------- 156 Top-level BB to IR conversion fn. 157 --------------------------------------------------------------- */ 158 159 /* See detailed comment in bb_to_IR.c. */ 160 extern 161 IRSB* bb_to_IR ( 162 /*OUT*/VexGuestExtents* vge, 163 /*OUT*/UInt* n_sc_extents, 164 /*IN*/ void* callback_opaque, 165 /*IN*/ DisOneInstrFn dis_instr_fn, 166 /*IN*/ UChar* guest_code, 167 /*IN*/ Addr64 guest_IP_bbstart, 168 /*IN*/ Bool (*chase_into_ok)(void*,Addr64), 169 /*IN*/ Bool host_bigendian, 170 /*IN*/ VexArch arch_guest, 171 /*IN*/ VexArchInfo* archinfo_guest, 172 /*IN*/ VexAbiInfo* abiinfo_both, 173 /*IN*/ IRType guest_word_type, 174 /*IN*/ UInt (*needs_self_check)(void*,VexGuestExtents*), 175 /*IN*/ Bool (*preamble_function)(void*,IRSB*), 176 /*IN*/ Int offB_TISTART, 177 /*IN*/ Int offB_TILEN 178 ); 179 180 181 #endif /* ndef __VEX_GUEST_GENERIC_BB_TO_IR_H */ 182 183 /*--------------------------------------------------------------------*/ 184 /*--- end guest_generic_bb_to_IR.h ---*/ 185 /*--------------------------------------------------------------------*/ 186
