/external/elfutils/libasm/ |
asm_addint8.c | 46 #define BSWAP(size) _BSWAP(size) 104 var = BSWAP(SIZE) (var);
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/external/opencv/otherlibs/highgui/ |
bitstrm.h | 259 #define BSWAP(v) (((v)<<24)|(((v)&0xff00)<<8)| \
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bitstrm.cpp | 67 temp = BSWAP( temp );
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grfmt_tiff.cpp | 289 val = BSWAP( val );
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/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 313 BSWAP, CTTZ, CTLZ, CTPOP, [all...] |
/external/dropbear/libtomcrypt/src/ciphers/ |
rc5.c | 85 L[j++] = BSWAP(A); 92 L[j++] = BSWAP(A);
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rc6.c | 75 L[j++] = BSWAP(A); 83 L[j++] = BSWAP(A);
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/prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
rtl.def | 609 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY) [all...] |
genrtl.h | 1059 gen_rtx_fmt_e (BSWAP, (MODE), (ARG0)) [all...] |
/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
rtl.def | 609 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY) [all...] |
genrtl.h | 1059 gen_rtx_fmt_e (BSWAP, (MODE), (ARG0)) [all...] |
/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
rtl.def | 609 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY) [all...] |
genrtl.h | 1059 gen_rtx_fmt_e (BSWAP, (MODE), (ARG0)) [all...] |
/external/dropbear/libtomcrypt/src/headers/ |
tomcrypt_macros.h | 230 #define BSWAP(x) ( ((x>>24)&0x000000FFUL) | ((x<<24)&0xFF000000UL) | \
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/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 270 case ISD::BSWAP: return "bswap";
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LegalizeIntegerTypes.cpp | 54 case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break; 270 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), [all...] |
LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
LegalizeVectorTypes.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 174 setOperationAction(ISD::BSWAP, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 151 // PowerPC does not have BSWAP, CTPOP or CTTZ 152 setOperationAction(ISD::BSWAP, MVT::i32 , Expand); 157 setOperationAction(ISD::BSWAP, MVT::i64 , Expand); 415 setTargetDAGCombine(ISD::BSWAP); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 770 setOperationAction(ISD::BSWAP, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 279 // SPU does not have BSWAP. It does have i32 support CTLZ. 281 setOperationAction(ISD::BSWAP, MVT::i32, Expand); 282 setOperationAction(ISD::BSWAP, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 258 setOperationAction(ISD::BSWAP, MVT::i32, Expand); 259 setOperationAction(ISD::BSWAP, MVT::i64, Expand); [all...] |