| /external/clang/test/Misc/ |
| diag-line-wrapping.cpp | 4 struct D1 : B {};
6 struct DD : D1, D2 {
11 // CHECK: struct DD -> struct D1 -> struct B
|
| /external/clang/test/CodeGen/ |
| mips64-class-return.cpp | 14 class D1 : public B1 {
24 extern D1 gd1;
33 D1 foo2(void) {
|
| /external/mesa3d/src/glsl/glcpp/tests/ |
| 067-nested-ifdef-ifndef.c | 1 #define D1
14 #ifndef D1
24 #ifdef D1
|
| /external/clang/test/CXX/class.derived/class.member.lookup/ |
| p8.cpp | 12 struct D1 : public Base {};
15 struct Derived : public D1, public D2 {
21 d.D1::Foo();
22 d.D1::Member = 17;
26 D1::Foo();
27 D1::Member = 42;
28 this->D1::Foo();
29 this->D1::Member = 42;
|
| /prebuilts/gcc/darwin-x86/x86/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/ |
| lwpintrin.h | 62 #define __lwpval32(D2, D1, F) \
63 (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
66 #define __lwpval64(D2, D1, F) \
67 (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
88 #define __lwpins32(D2, D1, F) \
89 (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
92 #define __lwpins64(D2, D1, F) \
93 (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/lib/gcc/i686-linux/4.4.3/include/ |
| lwpintrin.h | 62 #define __lwpval32(D2, D1, F) \
63 (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
66 #define __lwpval64(D2, D1, F) \
67 (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
88 #define __lwpins32(D2, D1, F) \
89 (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
92 #define __lwpins64(D2, D1, F) \
93 (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/lib/gcc/i686-linux/4.6.x-google/include/ |
| lwpintrin.h | 62 #define __lwpval32(D2, D1, F) \
63 (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
66 #define __lwpval64(D2, D1, F) \
67 (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
88 #define __lwpins32(D2, D1, F) \
89 (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
92 #define __lwpins64(D2, D1, F) \
93 (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/lib/gcc/x86_64-linux/4.6.x-google/include/ |
| lwpintrin.h | 62 #define __lwpval32(D2, D1, F) \
63 (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
66 #define __lwpval64(D2, D1, F) \
67 (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
88 #define __lwpins32(D2, D1, F) \
89 (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
92 #define __lwpins64(D2, D1, F) \
93 (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
|
| /prebuilts/gcc/linux-x86/x86/i686-android-linux-4.4.3/lib/gcc/i686-android-linux/4.4.3/include/ |
| lwpintrin.h | 62 #define __lwpval32(D2, D1, F) \
63 (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
66 #define __lwpval64(D2, D1, F) \
67 (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
88 #define __lwpins32(D2, D1, F) \
89 (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
92 #define __lwpins64(D2, D1, F) \
93 (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
|
| /external/clang/test/SemaTemplate/ |
| class-template-id-2.cpp | 16 struct D1 {
|
| elaborated-type-specifier.cpp | 10 struct D1 {
18 template class D<D1>;
|
| /external/valgrind/main/cachegrind/tests/ |
| chdir.stderr.exp | 10 D1 misses:
12 D1 miss rate:
|
| dlclose.stderr.exp | 10 D1 misses:
12 D1 miss rate:
|
| notpower2.stderr.exp | 10 D1 misses:
12 D1 miss rate:
|
| wrap5.stderr.exp | 10 D1 misses:
12 D1 miss rate:
|
| /external/valgrind/main/cachegrind/tests/x86/ |
| fpu-28-108.stderr.exp | 10 D1 misses:
12 D1 miss rate:
|
| /external/clang/test/CXX/special/class.inhctor/ |
| p3.cpp | 7 struct D1 : B1 {
10 D1 d1a(1), d1b(1, 1);
12 D1 fd1() { return 1; }
|
| /external/valgrind/main/callgrind/tests/ |
| notpower2-hwpref.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| notpower2-use.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| notpower2-wb.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| notpower2.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| simwork-both.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| simwork-cache.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| simwork1.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
| simwork2.stderr.exp | 13 D1 misses:
15 D1 miss rate:
|
