| /external/v8/src/ |
| natives.h | 39 CORE, EXPERIMENTAL, D8, TEST
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_TransformResidual4x4_s.s | 69 de3 DN D8.S16
71 dIn3RS DN D8.S16
81 dg3 DN D8.S16
83 df3RS DN D8.S16
96 M_START armVCM4P10_TransformResidual4x4, ,d8
|
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 116 dVRow0 DN D8.8
118 dVRow0U16 DN D8.U16
120 dVRow2U16 DN D8.U16
148 de3 DN D8.S16
150 dIn3RS DN D8.S16
160 dg3 DN D8.S16
162 df3RS DN D8.S16
|
| armVCM4P10_Interpolate_Chroma_s.s | 93 dOutRow0 DN D8.U8
96 dOutRow0U64 DN D8.U64
99 dOutRow0U32 DN D8.U32
102 dOutRow0U16 DN D8.U16
|
| armVCM4P10_DeblockingChroma_unsafe_s.s | 33 dQ_0 DN D8.U8
90 ;// Inputs - Pixels - p0-p3: D4-D7, q0-q3: D8-D11
166 ;// Inputs - Pixels - p0-p3: D4-D7, q0-q3: D8-D11
|
| omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 50 dRow1 DN D8.U8
63 dQ_0 DN D8.U8
136 ;// q0-q3 - d8-d11
|
| omxVCM4P10_PredictIntra_16x16_s.s | 70 dSum DN D8.U64
71 dSum0 DN D8.U8[0]
130 dDiffAbove0 DN D8.S16
|
| omxVCM4P10_PredictIntra_4x4_s.s | 112 dTmp1 DN D8.U8
136 dTmp1U64 DN D8.U64
140 dTmp1U32 DN D8.U32
|
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 52 dRow1 DN D8.U8
103 dQ_0 DN D8.U8
227 ;// q0-q3 - d8-d11
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| pred_lt4_1_neon.s | 57 VQDMULL.S16 Q15, D8, D0
69 VEXT.S16 D8, D8, D9, #1
|
| Syn_filt_32_neon.s | 59 VLD1.S16 {D8, D9, D10, D11}, [r11]! @ sig_lo[-16] ~ sig_lo[-1]
68 VMULL.S16 Q10, D8, D3
69 VEXT.8 D8, D8, D9, #2
|
| Dot_p_neon.s | 56 VMLAL.S16 Q15, D24, D8
88 VMLAL.S16 Q15, D8, D8
|
| Filt_6k_7k_neon.s | 99 VMULL.S16 Q9,D8,D0[0]
120 VMLAL.S16 Q9,D8,D0[1]
142 VMLAL.S16 Q9,D8,D0[2]
164 VMLAL.S16 Q9,D8,D0[3]
186 VMOV.S16 D8,D9
|
| Norm_Corr_neon.s | 86 VMLAL.S16 Q10, D8, D8
121 VMULL.S16 Q11, D0, D8 @L_tmp += x[] * excf[]
142 VMLAL.S16 Q11, D0, D8
|
| syn_filt_neon.s | 51 VMOV.S16 D8[0], r5
|
| scale_sig_neon.s | 101 VSHLL.S16 Q10, D8, #16
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_QuantInvInter_I_s.s | 88 dResult1 DN D8.S16
90 dSign1 DN D8.S16
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 29 D8:
765 // CHECK: ('_string', 'D8')
|
| x86_64-symbols.s | 29 D8:
730 // CHECK: ('_string', 'D8')
|
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 196 if (Reg == ARM::D8)
198 if (Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs()) {
587 if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
606 // vpush {d8, d10, d11} -> vpush {d8}, vpush {d10, d11}
658 if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
670 // vpop {d8, d10, d11} -> vpop {d8}, vpop {d10, d11
[all...] |
| ARMBaseRegisterInfo.h | 68 case D11: case D10: case D9: case D8:
|
| /external/llvm/lib/Target/Sparc/ |
| FPMover.cpp | 71 SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8,
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMBaseInfo.h | 163 case R8: case S8: case D8: case Q8: return 8;
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsBaseInfo.h | 160 case Mips::D8:
|
| /external/llvm/utils/TableGen/ |
| X86RecognizableInstr.cpp | 41 MAP(D8, 48) \
76 D8 = 3, D9 = 4, DA = 5, DB = 6,
944 case X86Local::D8:
961 opcodeToSet = 0xd8 + (Prefix - X86Local::D8);
[all...] |
