| /external/llvm/lib/Target/XCore/ |
| XCoreSubtarget.cpp | 27 const std::string &CPU, const std::string &FS)
28 : XCoreGenSubtargetInfo(TT, CPU, FS)
|
| XCoreSubtarget.h | 35 const std::string &FS);
39 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| XCoreTargetMachine.cpp | 24 StringRef CPU, StringRef FS,
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29 Subtarget(TT, CPU, FS),
|
| /gdk/build/awk/ |
| extract-pid.awk | 31 FS=" "
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430Subtarget.cpp | 28 const std::string &FS) :
29 MSP430GenSubtargetInfo(TT, CPU, FS) {
33 ParseSubtargetFeatures(CPUName, FS);
|
| MSP430Subtarget.h | 34 const std::string &FS);
38 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| MSP430TargetMachine.cpp | 30 StringRef FS,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS),
|
| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.cpp | 27 const std::string &FS, bool is64Bit) :
28 SparcGenSubtargetInfo(TT, CPU, FS),
45 ParseSubtargetFeatures(CPUName, FS);
|
| SparcTargetMachine.cpp | 29 StringRef CPU, StringRef FS,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS, is64bit),
79 StringRef FS,
84 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
91 StringRef FS,
96 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| SparcSubtarget.h | 35 const std::string &FS, bool is64bit);
43 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/clang/lib/Analysis/ |
| FormatStringParsing.h | 47 bool ParseLengthModifier(FormatSpecifier &FS, const char *&Beg, const char *E,
51 T FS;
58 const T &fs)
59 : FS(fs), Start(start), Stop(false) {}
66 return FS;
68 const T &getValue() { return FS; }
|
| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 39 uint64_t FeatureBits; // Feature bits for current CPU + FS
42 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
62 uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
70 uint64_t ToggleFeature(StringRef FS);
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUSubtarget.cpp | 26 const std::string &FS) :
27 SPUGenSubtargetInfo(TT, CPU, FS),
37 ParseSubtargetFeatures(default_cpu, FS);
|
| SPUSubtarget.h | 57 const std::string &FS);
61 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSubtarget.cpp | 34 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS):
35 HexagonGenSubtargetInfo(TT, CPU, FS),
38 ParseSubtargetFeatures(CPU, FS);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeSubtarget.cpp | 28 const std::string &FS):
29 MBlazeGenSubtargetInfo(TT, CPU, FS),
37 ParseSubtargetFeatures(CPUName, FS);
|
| /external/llvm/lib/Target/PTX/ |
| PTXSubtarget.cpp | 28 const std::string &FS, bool is64Bit)
29 : PTXGenSubtargetInfo(TT, CPU, FS),
38 ParseSubtargetFeatures(TARGET, FS);
|
| PTXTargetMachine.cpp | 72 StringRef TT, StringRef CPU, StringRef FS,
77 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
79 Subtarget(TT, CPU, FS, is64Bit),
89 StringRef CPU, StringRef FS,
93 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
99 StringRef CPU, StringRef FS,
103 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| /external/llvm/lib/MC/ |
| MCSubtargetInfo.cpp | 21 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
39 SubtargetFeatures Features(FS);
47 uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) {
48 SubtargetFeatures Features(FS);
63 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
65 FeatureBits = Features.ToggleFeature(FeatureBits, FS,
|
| /external/llvm/lib/Target/CppBackend/ |
| CPPTargetMachine.h | 26 StringRef CPU, StringRef FS, const TargetOptions &Options,
29 : TargetMachine(T, TT, CPU, FS, Options) {}
|
| /ndk/build/awk/ |
| extract-pid.awk | 27 FS=" "
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
| reg.h | 53 # define FS 25
69 # define FS 9
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 53 # define FS 25
69 # define FS 9
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 53 # define FS 25
69 # define FS 9
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.cpp | 38 StringRef CPU, StringRef FS, const TargetOptions &Options,
42 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
43 Subtarget(TT, CPU, FS, isLittle),
60 StringRef CPU, StringRef FS, const TargetOptions &Options,
63 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
69 StringRef CPU, StringRef FS, const TargetOptions &Options,
72 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
78 StringRef CPU, StringRef FS, const TargetOptions &Options,
81 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
87 StringRef CPU, StringRef FS, const TargetOptions &Options
[all...] |
