| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 189 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
191 SDIVREM, UDIVREM,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 165 case ISD::SDIVREM: return "sdivrem";
|
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 180 setOperationAction(ISD::SDIVREM, MVT::i8, Expand);
186 setOperationAction(ISD::SDIVREM, MVT::i16, Expand);
192 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
198 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
204 setOperationAction(ISD::SDIVREM, MVT::i128, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 158 setOperationAction(ISD::SDIVREM, MVT::i8, Expand);
164 setOperationAction(ISD::SDIVREM, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 103 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 264 setTargetDAGCombine(ISD::SDIVREM);
479 unsigned opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem :
717 case ISD::SDIVREM:
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 716 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86ISelLowering.cpp | 738 setOperationAction(ISD::SDIVREM, (MVT::SimpleValueType)VT, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 118 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
124 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
126 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
352 setOperationAction(ISD::SDIVREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 644 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
[all...] |
