| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 189 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
191 SDIVREM, UDIVREM,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 166 case ISD::UDIVREM: return "udivrem";
|
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 181 setOperationAction(ISD::UDIVREM, MVT::i8, Expand);
187 setOperationAction(ISD::UDIVREM, MVT::i16, Expand);
193 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
199 setOperationAction(ISD::UDIVREM, MVT::i64, Expand);
205 setOperationAction(ISD::UDIVREM, MVT::i128, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 155 setOperationAction(ISD::UDIVREM, MVT::i8, Expand);
161 setOperationAction(ISD::UDIVREM, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 104 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 717 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 265 setTargetDAGCombine(ISD::UDIVREM);
718 case ISD::UDIVREM:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 118 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
123 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
125 setOperationAction(ISD::UDIVREM, MVT::i64, Expand);
351 setOperationAction(ISD::UDIVREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86ISelLowering.cpp | 739 setOperationAction(ISD::UDIVREM, (MVT::SimpleValueType)VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 645 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
[all...] |
