/external/llvm/lib/Target/PTX/ |
PTXISelLowering.cpp | 39 addRegisterClass(MVT::i1, PTX::RegPredRegisterClass); 40 addRegisterClass(MVT::i16, PTX::RegI16RegisterClass); 41 addRegisterClass(MVT::i32, PTX::RegI32RegisterClass); 42 addRegisterClass(MVT::i64, PTX::RegI64RegisterClass); 43 addRegisterClass(MVT::f32, PTX::RegF32RegisterClass); 44 addRegisterClass(MVT::f64, PTX::RegF64RegisterClass);
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/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 103 addRegisterClass(MVT::i8, SPU::R8CRegisterClass); 104 addRegisterClass(MVT::i16, SPU::R16CRegisterClass); 105 addRegisterClass(MVT::i32, SPU::R32CRegisterClass); 106 addRegisterClass(MVT::i64, SPU::R64CRegisterClass); 107 addRegisterClass(MVT::f32, SPU::R32FPRegisterClass); 108 addRegisterClass(MVT::f64, SPU::R64FPRegisterClass); 109 addRegisterClass(MVT::i128, SPU::GPRCRegisterClass); 400 addRegisterClass(MVT::v16i8, SPU::VECREGRegisterClass); 401 addRegisterClass(MVT::v8i16, SPU::VECREGRegisterClass); 402 addRegisterClass(MVT::v4i32, SPU::VECREGRegisterClass) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 692 addRegisterClass(MVT::i32, SP::IntRegsRegisterClass); 693 addRegisterClass(MVT::f32, SP::FPRegsRegisterClass); 694 addRegisterClass(MVT::f64, SP::DFPRegsRegisterClass); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 65 addRegisterClass(MVT::i32, MBlaze::GPRRegisterClass); 67 addRegisterClass(MVT::f32, MBlaze::GPRRegisterClass); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 219 addRegisterClass(MVT::i8, X86::GR8RegisterClass); 220 addRegisterClass(MVT::i16, X86::GR16RegisterClass); 221 addRegisterClass(MVT::i32, X86::GR32RegisterClass); 223 addRegisterClass(MVT::i64, X86::GR64RegisterClass); 571 addRegisterClass(MVT::f32, X86::FR32RegisterClass); 572 addRegisterClass(MVT::f64, X86::FR64RegisterClass); 603 addRegisterClass(MVT::f32, X86::FR32RegisterClass); 604 addRegisterClass(MVT::f64, X86::RFP64RegisterClass); 636 addRegisterClass(MVT::f64, X86::RFP64RegisterClass); 637 addRegisterClass(MVT::f32, X86::RFP32RegisterClass) [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 99 addRegisterClass(MVT::i32, Mips::CPURegsRegisterClass); 102 addRegisterClass(MVT::i64, Mips::CPU64RegsRegisterClass); 105 addRegisterClass(MVT::f32, Mips::FGR32RegisterClass); 110 addRegisterClass(MVT::f64, Mips::FGR64RegisterClass); 112 addRegisterClass(MVT::f64, Mips::AFGR64RegisterClass); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 67 addRegisterClass(MVT::i8, MSP430::GR8RegisterClass); 68 addRegisterClass(MVT::i16, MSP430::GR16RegisterClass); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 79 addRegisterClass(MVT::i32, PPC::GPRCRegisterClass); 80 addRegisterClass(MVT::f32, PPC::F4RCRegisterClass); 81 addRegisterClass(MVT::f64, PPC::F8RCRegisterClass); 295 addRegisterClass(MVT::i64, PPC::G8RCRegisterClass); 373 addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass); 374 addRegisterClass(MVT::v4i32, PPC::VRRCRegisterClass); 375 addRegisterClass(MVT::v8i16, PPC::VRRCRegisterClass); 376 addRegisterClass(MVT::v16i8, PPC::VRRCRegisterClass); [all...] |
/external/llvm/include/llvm/Target/ |
TargetLowering.h | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 69 addRegisterClass(MVT::i32, XCore::GRRegsRegisterClass); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 156 addRegisterClass(VT, ARM::DPRRegisterClass); 161 addRegisterClass(VT, ARM::QPRRegisterClass); 434 addRegisterClass(MVT::i32, ARM::tGPRRegisterClass); 436 addRegisterClass(MVT::i32, ARM::GPRRegisterClass); 439 addRegisterClass(MVT::f32, ARM::SPRRegisterClass); 441 addRegisterClass(MVT::f64, ARM::DPRRegisterClass); [all...] |