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Searched
refs:virtReg
(Results
1 - 3
of
3
) sorted by null
/external/llvm/lib/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
VirtRegMap.cpp
78
unsigned VirtRegMap::getRegAllocPref(unsigned
virtReg
) {
79
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(
virtReg
);
89
int VirtRegMap::assignVirt2StackSlot(unsigned
virtReg
) {
90
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
91
assert(Virt2StackSlotMap[
virtReg
] == NO_STACK_SLOT &&
93
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(
virtReg
);
94
return Virt2StackSlotMap[
virtReg
] = createSpillSlot(RC);
97
void VirtRegMap::assignVirt2StackSlot(unsigned
virtReg
, int SS) {
98
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
99
assert(Virt2StackSlotMap[
virtReg
] == NO_STACK_SLOT &
[
all
...]
LiveIntervalUnion.h
90
void unify(LiveInterval &
VirtReg
);
93
void extract(LiveInterval &
VirtReg
);
110
LiveInterval *
VirtReg
;
111
LiveInterval::iterator VirtRegI; // current position in
VirtReg
120
Query(): LiveUnion(),
VirtReg
(), Tag(0), UserTag(0) {}
123
LiveUnion(LIU),
VirtReg
(VReg), CheckedFirstInterference(false),
129
VirtReg
= NULL;
140
if (UserTag == UTag &&
VirtReg
== VReg &&
147
VirtReg
= VReg;
152
LiveInterval &
virtReg
() const
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...]
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