| /external/llvm/test/Transforms/InstCombine/ |
| merge-icmp.ll | 3 define i1 @test1(i16* %x) {
4 %load = load i16* %x, align 4
5 %trunc = trunc i16 %load to i8
7 %and = and i16 %load, -256
8 %cmp2 = icmp eq i16 %and, 17664
12 ; CHECK-NEXT: load i16
13 ; CHECK-NEXT: icmp eq i16 %load, 17791
17 define i1 @test2(i16* %x) {
18 %load = load i16* %x, align 4
19 %and = and i16 %load, -25
[all...] |
| shufflemask-undef.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
6 %struct.AlphaTest = type { float, i16, i8, i8 }
8 %struct.BlendMode = type { i16, i16, i16, i16, %struct.IColor4, i16, i16, i8, i8, i8, i8 }
11 %struct.ColorBuffer = type { i16, i8, i8, [8 x i16], [0 x i32]
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| 2008-08-13-CmpStride.ll | 3 @g_3 = common global i16 0 ; <i16*> [#uses=2]
11 %l_2.0.reg2mem.0 = phi i16 [ 0, %entry ], [ %t1, %bb ] ; <i16> [#uses=2]
12 %t0 = shl i16 %l_2.0.reg2mem.0, 1 ; <i16>:0 [#uses=1]
13 store volatile i16 %t0, i16* @g_3, align 2
14 %t1 = add i16 %l_2.0.reg2mem.0, -3 ; <i16>:1 [#uses=2
[all...] |
| /external/llvm/test/CodeGen/MSP430/ |
| bit.ll | 2 target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
86 @foo16 = external global i16
87 @bar16 = external global i16
89 define i16 @bitwrr(i16 %a, i16 %b) nounwind {
90 %t1 = and i16 %a, %b
91 %t2 = icmp ne i16 %t1, 0
92 %t3 = zext i1 %t2 to i16
93 ret i16 %t
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| vshift-1.ll | 51 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
55 %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5
[all...] |
| vshift-2.ll | 51 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
55 %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5
[all...] |
| vshift-3.ll | 41 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
45 %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5
[all...] |
| 2008-06-18-BadShuffle.ll | 4 define <8 x i16> @a(<8 x i16> %a) nounwind {
6 shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> < i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8 >
7 %add = add <8 x i16> %0, %a
8 ret <8 x i16> %add
|
| 2012-01-11-split-cv.ll | 4 define void @add18i16(<18 x i16>* nocapture sret %ret, <18 x i16>* %bp) nounwind {
6 %b = load <18 x i16>* %bp, align 16
7 %x = add <18 x i16> zeroinitializer, %b
8 store <18 x i16> %x, <18 x i16>* %ret, align 16
|
| pr3250.ll | 4 declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
11 %2 = trunc i32 %1 to i16 ; <i16> [#uses=1]
12 %3 = tail call i32 @safe_sub_func_short_u_u(i16 signext 1, i16 signext
|
| scalar-extract.ll | 7 define void @foo(<2 x i16>* %A, <2 x i16>* %B) {
9 %tmp1 = load <2 x i16>* %A ; <<2 x i16>> [#uses=1]
10 store <2 x i16> %tmp1, <2 x i16>* %B
|
| vec_shift.ll | 7 %tmp6 = bitcast <2 x i64> %c to <8 x i16> ; <<8 x i16>> [#uses=1]
8 %tmp8 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1]
9 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1]
10 %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
16 %tmp2 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1
[all...] |
| vec_shuffle-31.ll | 4 define <8 x i16> @shuf3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
6 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
7 ret <8 x i16> %tmp9
|
| widen_arith-3.ll | 12 define void @update(<3 x i16>* %dst, <3 x i16>* %src, i32 %n) nounwind {
14 %dst.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
15 %src.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
17 %v = alloca <3 x i16>, align 8 ; <<3 x i16>*> [#uses=1]
19 store <3 x i16>* %dst, <3 x i16>** %dst.add
[all...] |
| vec_set-4.ll | 3 define <2 x i64> @test(i16 %a) nounwind {
5 %tmp10 = insertelement <8 x i16> zeroinitializer, i16 %a, i32 3 ; <<8 x i16>> [#uses=1]
6 %tmp12 = insertelement <8 x i16> %tmp10, i16 0, i32 4 ; <<8 x i16>> [#uses=1]
7 %tmp14 = insertelement <8 x i16> %tmp12, i16 0, i32 5 ; <<8 x i16>> [#uses=1
[all...] |
| 2007-05-17-ShuffleISelBug.ll | 4 declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>)
6 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>)
9 %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 >
10 %tmp715 = mul <8 x i16> zeroinitializer, %tmp633
11 %tmp776 = bitcast <8 x i16> %tmp715 to <4 x i32>
14 %tmp832 = bitcast <4 x i32> %tmp805 to <8 x i16>
[all...] |
| avx-shift.ll | 14 define <16 x i16> @vshift01(<16 x i16> %a) nounwind readnone {
15 %s = shl <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2
[all...] |
| /external/llvm/test/Assembler/ |
| 2004-01-11-getelementptrfolding.ll | 5 %struct.TUVVertex = type { i16, i16, i16, i16 }
9 store i16 0, i16* getelementptr ([2908 x %struct.TTriangleItem]* @data_triangleItems, i64 0, i64 0, i32 2, i64 0, i32 0)
|
| /external/llvm/test/CodeGen/Generic/ |
| overflow.ll | 17 define zeroext i16 @sadd_i16(i16 signext %a, i16 signext %b) nounwind ssp {
19 %sadd = tail call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
20 %cmp = extractvalue { i16, i1 } %sadd, 1
21 %sadd.result = extractvalue { i16, i1 } %sadd, 0
22 %X = select i1 %cmp, i16 %sadd.result, i16 4
[all...] |
| llvm-ct-intrinsics.ll | 8 declare i16 @llvm.ctpop.i16(i16)
12 define void @ctpoptest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
14 %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
18 store i16 %b, i16* %B
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| 2008-07-16-SignExtInReg.ll | 11 define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind {
14 add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
15 ret i16 %0
|
| /external/llvm/test/CodeGen/PowerPC/ |
| mem_update.ll | 22 define i16* @test2(i16* %X, i32* %dest) nounwind {
23 %Y = getelementptr i16* %X, i32 4
24 %A = load i16* %Y
25 %B = sext i16 %A to i32
27 ret i16* %Y
30 define i16* @test3(i16* %X, i32* %dest) nounwind {
31 %Y = getelementptr i16* %X, i32 4
32 %A = load i16* %
[all...] |
| /external/llvm/test/Transforms/LowerSwitch/ |
| 2004-03-13-SwitchIsDefaultCrash.ll | 5 %targetBlock = call i16 @solve_code( ) ; <i16> [#uses=1]
12 switch i16 %targetBlock, label %codeReplTail [
13 i16 0, label %loopexit.0
14 i16 1, label %then.1
18 declare i16 @solve_code()
|
| /external/clang/test/CodeGen/ |
| string-literal-short-wstring.c | 9 // CHECK: private unnamed_addr constant [3 x i16] [i16 65, i16 66, i16 0]
13 // CHECK: private unnamed_addr constant [5 x i16] [i16 4384, i16 544, i16 -9272, i16 -9168, i16 0
[all...] |
| /external/llvm/test/CodeGen/CellSPU/ |
| crash.ll | 3 declare i16 @return_i16()
6 %rv2 = call i16 @return_i16()
|
