| /external/llvm/test/CodeGen/Generic/ |
| 2007-04-27-InlineAsm-X-Dest.ll | 5 define void @test(i16 * %t) {
6 call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* %t )
|
| /external/llvm/test/CodeGen/X86/ |
| 2007-06-28-X86-64-isel.ll | 4 %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
5 %tmp2 = bitcast <8 x i16> %tmp1 to <4 x i32>
16 declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)
|
| 2009-06-05-VariableIndexInsert.ll | 5 %conv = bitcast <2 x i64> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
6 %conv2 = trunc i32 %b to i16 ; <i16> [#uses=1]
8 %vecins = insertelement <8 x i16> %conv, i16 %conv2, i32 %and ; <<8 x i16>> [#uses=1]
9 %conv6 = bitcast <8 x i16> %vecins to <2 x i64> ; <<2 x i64>> [#uses=1]
|
| extend.ll | 7 define i16 @test1() {
9 %tmp.3 = zext i8 %tmp.0 to i16 ; <i16> [#uses=1]
10 ret i16 %tmp.3
13 define i16 @test2() {
15 %tmp.3 = sext i8 %tmp.0 to i16 ; <i16> [#uses=1]
16 ret i16 %tmp.3
|
| 2007-03-24-InlineAsmMultiRegConstraint.ll | 3 define i32 @test(i16 %tmp40414244) {
4 %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 )
8 define i32 @test2(i16 %tmp40414244) {
9 %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 14 )
|
| 2010-01-05-ZExt-Shl.ll | 5 declare void @func2(i16 zeroext)
12 %t4 = select i1 %t3, i16 0, i16 128
13 call void @func2(i16 zeroext %t4) nounwind
|
| f16c-intrinsics.ll | 3 define <4 x float> @test_x86_vcvtph2ps_128(<8 x i16> %a0) {
5 %res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0) ; <<4 x float>> [#uses=1]
8 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly
11 define <8 x float> @test_x86_vcvtph2ps_256(<8 x i16> %a0) {
13 %res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0) ; <<8 x float>> [#uses=1]
16 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly
19 define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) {
21 %res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
22 ret <8 x i16> %re
[all...] |
| h-registers-3.ll | 6 %0 = tail call zeroext i16 (...)* @bar() nounwind
7 %1 = lshr i16 %0, 8
8 %2 = trunc i16 %1 to i8
12 declare zeroext i16 @bar(...)
|
| sse3.ll | 9 define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind {
11 %tmp3 = load <8 x i16>* %old
12 %tmp6 = shufflevector <8 x i16> %tmp3,
13 <8 x i16> < i16 0, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >
[all...] |
| avx2-vperm2i128.ll | 31 define <16 x i16> @E4(<16 x i16> %a, <16 x i16> %b) nounwind uwtable readnone ssp {
34 %a2 = add <16 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1
[all...] |
| loop-strength-reduce5.ll | 3 @X = weak global i16 0 ; <i16*> [#uses=1]
4 @Y = weak global i16 0 ; <i16*> [#uses=1]
13 %tmp1 = trunc i32 %i.014.0 to i16 ; <i16> [#uses=2]
14 store volatile i16 %tmp1, i16* @X, align 2
15 %tmp34 = shl i16 %tmp1, 2 ; <i16> [#uses=1
[all...] |
| x86-64-shortint.ll | 7 define void @bar(i16 zeroext %A) {
8 tail call void @foo( i16 signext %A )
11 declare void @foo(i16 signext )
|
| vec_cast.ll | 4 define <8 x i32> @a(<8 x i16> %a) nounwind {
5 %c = sext <8 x i16> %a to <8 x i32>
9 ;define <3 x i32> @b(<3 x i16> %a) nounwind {
10 ; %c = sext <3 x i16> %a to <3 x i32>
14 define <1 x i32> @c(<1 x i16> %a) nounwind {
15 %c = sext <1 x i16> %a to <1 x i32>
19 define <8 x i32> @d(<8 x i16> %a) nounwind {
20 %c = zext <8 x i16> %a to <8 x i32>
24 ;define <3 x i32> @e(<3 x i16> %a) nounwind {
25 ; %c = zext <3 x i16> %a to <3 x i32
[all...] |
| /external/llvm/test/Transforms/CorrelatedValuePropagation/ |
| 2010-09-02-Trunc.ll | 4 define i16 @test(i32 %a, i1 %b) {
17 ret i16 23
21 ; CHECK: select i1 %f, i16 1, i16 0
22 %h = select i1 %f, i16 1, i16 0
23 ; CHECK: ret i16 %h
24 ret i16 %h
|
| /external/llvm/test/CodeGen/PowerPC/ |
| bswap-load-store.ll | 21 define void @STHBRX(i16 %s, i8* %ptr, i32 %off) {
23 %tmp1.upgrd.3 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1]
24 %tmp5 = call i16 @llvm.bswap.i16( i16 %s ) ; <i16> [#uses=1]
25 store i16 %tmp5, i16* %tmp1.upgrd.3
29 define i16 @LHBRX(i8* %ptr, i32 %off)
[all...] |
| /external/llvm/test/CodeGen/CellSPU/ |
| and_ops.ll | 11 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
25 define <8 x i16> @and_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
26 %A = and <8 x i16> %arg1, %arg2
27 ret <8 x i16> %A
30 define <8 x i16> @and_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
31 %A = and <8 x i16> %arg2, %arg
[all...] |
| or_ops.ll | 12 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
26 define <8 x i16> @or_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
27 %A = or <8 x i16> %arg1, %arg2
28 ret <8 x i16> %A
31 define <8 x i16> @or_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
32 %A = or <8 x i16> %arg2, %arg
[all...] |
| nand.ll | 10 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
25 define <8 x i16> @nand_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
26 %A = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1]
27 %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1
[all...] |
| /external/llvm/test/CodeGen/MSP430/ |
| shifts.ll | 2 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
29 define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
33 %shr = lshr i16 %a, %cnt
34 ret i16 %shr
37 define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
41 %shr = ashr i16 %a, %cn
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| 2007-08-02-InfiniteLoop.ll | 4 define i64 @test(i16 %tmp510, i16 %tmp512) {
5 %W = sext i16 %tmp510 to i32 ; <i32> [#uses=1]
6 %X = sext i16 %tmp512 to i32 ; <i32> [#uses=1]
|
| 2007-03-19-BadTruncChangePR1261.ll | 4 define i16 @test(i31 %zzz) {
8 %D = trunc i32 %C to i16
9 ret i16 %D
|
| 2007-05-18-CastFoldBug.ll | 4 define void @blah(i16* %tmp10) {
6 call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend_stret to void (i16*)*)( i16* sret %tmp10 )
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_TransformDequantLumaDCFromPair_s.S | 21 VADD.I16 d4,d0,d1
22 VADD.I16 d5,d2,d3
23 VSUB.I16 d6,d0,d1
25 VSUB.I16 d7,d2,d3
27 VADD.I16 d0,d4,d5
28 VSUB.I16 d1,d4,d5
29 VSUB.I16 d2,d6,d7
31 VADD.I16 d3,d6,d7
35 VADD.I16 d4,d0,d1
36 VADD.I16 d5,d2,d
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-str_post.ll | 3 define i16 @test1(i32* %X, i16* %A) {
7 %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1]
8 store i16 %tmp1, i16* %A
9 %tmp2 = ptrtoint i16* %A to i16 ; <i16> [#uses=1]
10 %tmp3 = sub i16 %tmp2, 4 ; <i16> [#uses=1
[all...] |
| /external/llvm/test/Transforms/GlobalOpt/ |
| 2005-06-15-LocalizeConstExprCrash.ll | 4 @g_40507551 = internal global i16 31038 ; <i16*> [#uses=1]
7 %tmp.4.i.1 = load i8* getelementptr (i8* bitcast (i16* @g_40507551 to i8*), i32 1) ; <i8> [#uses=0]
|
