| /external/llvm/test/CodeGen/X86/ |
| 2008-09-11-CoalescerBug.ll | 4 @g_15 = external global i16 ; <i16*> [#uses=2]
9 %1 = load i16* @g_15, align 2 ; <i16> [#uses=1]
10 %2 = zext i16 %1 to i32 ; <i32> [#uses=1]
17 %9 = load i16* @g_15, align 2 ; <i16> [#uses=1]
18 %10 = icmp eq i16 %9, 0 ; <i1> [#uses=1]
|
| asm-modifier.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
10 %asmtmp.i = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 6) nounwind ; <i16> [#uses=1]
11 %0 = zext i16 %asmtmp.i to i32 ; <i32> [#uses=1]
15 define zeroext i16 @test2(i32 %address) nounwind {
19 %asmtmp = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 %address) nounwind ; <i16> [#uses=1]
20 ret i16 %asmtmp
|
| avx-sext.ll | 3 define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
7 %B = sext <8 x i16> %A to <8 x i32>
|
| avx2-logic.ll | 92 define <16 x i16> @allOnes2() nounwind {
95 ret <16 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1
[all...] |
| clz.ll | 4 declare i16 @llvm.cttz.i16(i16, i1)
8 declare i16 @llvm.ctlz.i16(i16, i1)
21 define i16 @cttz_i16(i16 %x) {
22 %tmp = call i16 @llvm.cttz.i16( i16 %x, i1 true
[all...] |
| sse1.ll | 5 define <8 x i16> @test1(<8 x i32> %a) nounwind {
7 ret <8 x i16> zeroinitializer
10 define <8 x i16> @test2(<8 x i32> %a) nounwind {
12 %c = trunc <8 x i32> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
13 ret <8 x i16> %c
17 ;define <4 x i32> @test3(<4 x i16> %a) nounwind {
18 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
|
| vec_compare-2.ll | 5 declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readnone
27 %tmp6.i29.i = bitcast <2 x i32> %swz.i.i28.i to <4 x i16> ; <<4 x i16>> [#uses=1]
28 %swz.i30.i = shufflevector <4 x i16> %tmp6.i29.i, <4 x i16> undef, <2 x i32> <i32 0, i32 1> ; <<2 x i16>> [#uses=1]
29 store <2 x i16> %swz.i30.i, <2 x i16>* undef
|
| 2009-08-23-SubRegReuseUndo.ll | 14 %0 = sext i8 %p_52 to i16 ; <i16> [#uses=1]
15 %1 = tail call i32 @func_24(i16 zeroext %0, i8 signext ptrtoint (i8 (i32, i8)* @foo to i8)) nounwind; <i32> [#uses=1]
19 %5 = tail call i32 @func_24(i16 zeroext 0, i8 signext undef) nounwind; <i32> [#uses=1]
25 %11 = tail call i32 @func_24(i16 zeroext ptrtoint (i8 (i32, i8)* @bar to i16), i8 signext %10) nounwind; <i32> [#uses=1]
26 %12 = tail call i32 @func_24(i16 zeroext 0, i8 signext 1) nounwind; <i32> [#uses=0]
49 %19 = sext i8 undef to i16 ; <i16> [#uses=1]
50 %20 = tail call i32 @func_24(i16 zeroext %19, i8 signext 1) nounwind; <i32> [#uses=0
[all...] |
| zext-sext.ll | 6 @llvm.used = appending global [1 x i8*] [i8* bitcast (void ([40 x i16]*, i32*, i16**, i64*)* @func to i8*)], section "llvm.metadata"
8 define void @func([40 x i16]* %a, i32* %b, i16** %c, i64* %d) nounwind {
10 %tmp103 = getelementptr inbounds [40 x i16]* %a, i64 0, i64 4
11 %tmp104 = load i16* %tmp103, align 2
12 %tmp105 = sext i16 %tmp104 to i32
15 %tmp108 = load i16** %c, align 8
17 %tmp110 = getelementptr inbounds i16* %tmp108, i64 %tmp109
18 %tmp111 = load i16* %tmp110, align
[all...] |
| avx-basic.ll | 120 define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly {
121 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32
[all...] |
| 2010-05-26-FP_TO_INT-crash.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
11 %1 = fptoui double %0 to i16 ; <i16> [#uses=1]
12 %2 = zext i16 %1 to i32 ; <i32> [#uses=1]
|
| fastcall-correct-mangling.ll | 5 define x86_fastcallcc void @func(i64 %X, i8 %Y, i8 %G, i16 %Z) {
|
| promote-assert-zext.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
15 %tmp17 = zext i8 %tmp14 to i16
19 %tmp18 = add i16 %tmp17, -1
20 %tmp23 = sext i16 %tmp18 to i64
|
| widen_cast-6.ll | 8 %retval12 = bitcast <2 x i16> zeroinitializer to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/InstCombine/ |
| zext-or-icmp.ll | 3 %struct.FooBar = type <{ i8, i8, [2 x i8], i8, i8, i8, i8, i16, i16, [4 x i8], [8 x %struct.Rock] }>
4 %struct.Rock = type { i16, i16 }
13 %tmp8 = getelementptr %struct.FooBar* %up, i32 0, i32 7 ; <i16*> [#uses=1]
14 %tmp9 = load i16* %tmp8, align 1 ; <i16> [#uses=1]
15 %tmp910 = zext i16 %tmp9 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| 2008-09-09-Overflow.ll | 21 %indvar = phi i16 [ 0, %entry ], [ %indvar.next, %bb ] ; <i16> [#uses=2]
22 %tmp = sub i16 0, %indvar ; <i16> [#uses=1]
23 %tmp27 = trunc i16 %tmp to i8 ; <i8> [#uses=1]
32 %indvar.next = add i16 %indvar, 1 ; <i16> [#uses=2]
33 %exitcond = icmp eq i16 %indvar.next, -28 ; <i1> [#uses=1]
|
| post-inc-icmpzero.ll | 14 ; CHECK: %lsr.iv.next3 = inttoptr i64 %lsr.iv.next to i16*
15 ; CHECK: %cmp27 = icmp eq i16* %lsr.iv.next3, null
17 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
20 %struct.Vector2 = type { i16*, [64 x i16], i32 }
26 %buffer = alloca [33 x i16], align 16
27 %add.ptr = getelementptr inbounds [33 x i16]* %buffer, i64 0, i64 33
34 %incdec.ptr = getelementptr [33 x i16]* %buffer, i64 0, i64 %tmp51
40 %conv = sext i8 %tmp5 to i16
41 store i16 %conv, i16* %incdec.ptr, align
[all...] |
| /external/llvm/test/Transforms/LoopUnswitch/ |
| 2006-06-13-SingleEntryPHI.ll | 3 %struct.BLEND_MAP = type { i16, i16, i16, i32, %struct.BLEND_MAP_ENTRY* }
5 %struct.TPATTERN = type { i16, i16, i16, i32, float, float, float, %struct.WARP*, %struct.TPATTERN*, %struct.BLEND_MAP*, { %struct.anon, [4 x i8] } }
6 %struct.TURB = type { i16, %struct.WARP*, [3 x double], i32, float, float }
7 %struct.WARP = type { i16, %struct.WARP* }
|
| /external/llvm/test/CodeGen/ARM/ |
| reg_sequence.ll | 5 %struct.int16x8_t = type { <8 x i16> }
9 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
12 define void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind {
26 %4 = bitcast i16* %i_ptr to i8* ; <i8*> [#uses=1]
27 %5 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %4, i32 1) ; <<8 x i16>> [#uses=1]
28 %6 = bitcast <8 x i16> %5 to <2 x double> ; <<2 x double>> [#uses=2]
30 %8 = bitcast double %7 to <4 x i16> ; <<4 x i16>> [#uses=1
[all...] |
| vld1.ll | 12 define <4 x i16> @vld1i16(i16* %A) nounwind {
15 %tmp0 = bitcast i16* %A to i8*
16 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
17 ret <4 x i16> %tmp1
21 define <4 x i16> @vld1i16_update(i16** %ptr) nounwind {
24 %A = load i16** %ptr
25 %tmp0 = bitcast i16* %A to i8*
26 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1
[all...] |
| vst1.ll | 12 define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind {
15 %tmp0 = bitcast i16* %A to i8*
16 %tmp1 = load <4 x i16>* %B
17 call void @llvm.arm.neon.vst1.v4i16(i8* %tmp0, <4 x i16> %tmp1, i32 1)
70 define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
74 %tmp0 = bitcast i16* %A to i8*
75 %tmp1 = load <8 x i16>* %B
76 call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 32
[all...] |
| /external/llvm/test/Transforms/DeadStoreElimination/ |
| crash.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
32 %2 = bitcast i8** %1 to i16* ; <i16*> [#uses=2]
33 %3 = getelementptr inbounds i16* %2, i64 undef ; <i16*> [#uses=1]
34 %4 = bitcast i16* %3 to i8* ; <i8*> [#uses=1]
36 %6 = getelementptr inbounds i16* %2, i64 undef ; <i16*> [#uses=1]
37 store i16 undef, i16* %6, align
[all...] |
| /external/clang/test/CodeGen/ |
| pr2394.c | 4 // CHECK: load i16
|
| struct-x86-darwin.c | 2 // RUN: grep "STest1 = type { i32, \[4 x i16\], double }" %t1
3 // RUN: grep "STest2 = type { i16, i16, i32, i32 }" %t1
4 // RUN: grep "STest3 = type { i8, i16, i32 }" %t1
|
| /external/llvm/test/CodeGen/XCore/ |
| load.ll | 21 define i32 @load16(i16* %p, i32 %offset) nounwind {
26 %0 = getelementptr i16* %p, i32 %offset
27 %1 = load i16* %0, align 2
28 %2 = sext i16 %1 to i32
|
