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  /build/core/combo/arch/x86/
x86-atom.mk 18 TARGET_GLOBAL_CFLAGS += -march=atom
  /external/llvm/test/CodeGen/ARM/
2007-04-03-PEIBug.ll 1 ; RUN: llc < %s -march=arm | not grep {add.*#0}
2008-03-05-SxtInRegBug.ll 1 ; RUN: llc < %s -march=arm -mattr=+v6 | not grep 255
2009-09-09-fpcmp-ole.ll 1 ; RUN: llc -O1 -march=arm -mattr=+vfp2 -mtriple=arm-linux-gnueabi < %s | FileCheck %s
2011-11-09-BitcastVectorDouble.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
addrmode.ll 1 ; RUN: llc < %s -march=arm -stats |& grep asm-printer | grep 4
bfc.ll 1 ; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
bic.ll 1 ; RUN: llc < %s -march=arm | FileCheck %s
extloadi1.ll 1 ; RUN: llc < %s -march=arm
fnegs.ll 1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
fold-const.ll 1 ; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s
fp-arg-shuffle.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s
fp_convert.ll 1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=VFP2
3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON
4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2
iabs.ll 1 ; RUN: llc < %s -march=arm -mattr=+v4t | FileCheck %s
ifcvt1.ll 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
inlineasm4.ll 1 ; RUN: llc < %s -march=arm | FileCheck %s
insn-sched1.ll 1 ; RUN: llc < %s -march=arm -mattr=+v6
mls.ll 1 ; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
movt.ll 1 ; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s
  /external/llvm/test/CodeGen/CPP/
2009-05-01-Long-Double.ll 1 ; RUN: llc < %s -march=cpp -cppgen=program -o %t
  /external/llvm/test/CodeGen/CellSPU/
bigstack.ll 1 ; RUN: llc < %s -march=cellspu -o %t1.s
div_ops.ll 1 ; RUN: llc --march=cellspu %s -o - | FileCheck %s
private.ll 3 ; RUN: llc < %s -march=cellspu > %t
storestruct.ll 1 ; RUN: llc < %s -march=cellspu | FileCheck %s
  /external/llvm/test/CodeGen/Hexagon/
args.ll 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s

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