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  /external/v8/src/x64/
regexp-macro-assembler-x64.h 132 // Offsets from rbp of function parameters and stored registers.
139 // Parameters (first four passed as registers, but with room on stack).
141 // stack (before the return address) to spill parameter registers. We
155 // are passed as registers, and caller must allocate space on the stack
168 // Microsoft calling convention has three callee-saved registers
187 // First register address. Following registers are below it on the stack.
216 // The registers containing a self pointer to this code's Code object.
270 // Number of registers to output at the end (the saved registers
  /bionic/libc/arch-arm/bionic/
memcmp16.S 78 /* save registers */
89 /* restore registers and return */
159 /* restore registers and return */
171 /* restore registers and return */
183 9: /* restore registers and return */
  /dalvik/dx/src/com/android/dx/ssa/
InterferenceRegisterMapper.java 30 * information for the registers in the new namespace.
53 * @param countOldRegisters number of registers in old namespace
132 * Checks to see if any of a set of old-namespace registers are
134 * account the category of the old-namespace registers.
139 * registers (starting at ropReg) to consider
Optimizer.java 65 * at the cost of some registers and insns
86 * at the cost of some registers and insns
115 * registers used by the end result. Dex bytecode does not have instruction
117 * If we've produced a method that uses more than 16 registers, try again
140 * CONST_COLLECTOR trades insns for registers, which is not an
  /external/dexmaker/src/dx/java/com/android/dx/ssa/
InterferenceRegisterMapper.java 30 * information for the registers in the new namespace.
53 * @param countOldRegisters number of registers in old namespace
132 * Checks to see if any of a set of old-namespace registers are
134 * account the category of the old-namespace registers.
139 * registers (starting at ropReg) to consider
Optimizer.java 65 * at the cost of some registers and insns
86 * at the cost of some registers and insns
115 * registers used by the end result. Dex bytecode does not have instruction
117 * If we've produced a method that uses more than 16 registers, try again
140 * CONST_COLLECTOR trades insns for registers, which is not an
  /external/llvm/docs/HistoricalNotes/
2003-06-26-Reoptimizer2.txt 9 registers. It assumes that the transformations you are doing are safe.
23 epilogues that copy live-outs back into the right registers, but
24 live-ins have to be in the right registers.)
37 It is not aggressively able to use lots of registers.
40 spilling registers, normally allocated on the stack, if the trace
  /external/llvm/include/llvm/Target/
TargetOpcodes.h 33 /// liveness of registers. This can be useful when dealing with
34 /// sub-registers.
63 /// virtual registers have been created for all the instructions, and it's
72 /// represent a consecutive sequence of sub-registers. It's used as register
84 /// used to copy between subregisters of virtual registers.
  /external/llvm/lib/Target/CellSPU/
SPURegisterInfo.h 51 /// After allocating this many registers, the allocator should feel
53 /// number of non callee saved registers in the C calling convention.
59 //! Return the array of callee-saved registers
62 //! Allow for scavenging, so we can get scratch registers when needed.
66 //! Return the reserved registers
  /external/llvm/test/MC/ARM/
thumb-diagnostics.s 14 @ Instructions which require v6+ for both registers to be low regs.
45 @ CHECK-ERRORS: error: registers must be in range r0-r7
59 @ CHECK-ERRORS: error: registers must be in range r0-r7 or pc
62 @ CHECK-ERRORS: error: registers must be in range r0-r7 or lr
73 @ CHECK-ERRORS: error: registers must be in range r0-r7
  /external/v8/test/mjsunit/
codegen-coverage.js 28 // Test paths in the code generator where values in specific registers
45 // get values in specific registers (ia32, x64):
53 // The call will spill registers and leave x in {eax,rax}.
64 // Locals are in the corresponding registers here.
94 // left, all available registers on the right, and a non-smi result.
  /external/valgrind/main/coregrind/m_gdbserver/
target.h 67 /* Fetch registers from the inferior process.
69 If REGNO is -1, fetch all registers; otherwise, fetch at least REGNO. */
73 /* Store registers to the inferior process.
75 If REGNO is -1, store all registers; otherwise, store at least REGNO. */
105 /* Same but describes also the shadow registers. */
  /external/kernel-headers/original/asm-mips/xtalk/
xwidget.h 89 * configuration registers is allowed. some widgets may allow 64-bits
90 * access but software should not depend on it. registers beyond the
97 /* widget configuration registers */
  /external/llvm/lib/Target/MSP430/
MSP430CallingConv.td 16 // i8 are returned in registers R15B, R14B, R13B, R12B
19 // i16 are returned in registers R15, R14, R13, R12
31 // integer registers.
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.td 19 // Registers are identified with 4-bit ID numbers.
20 // Ri - 32-bit integer registers
25 // CPU registers
  /external/valgrind/main/gdbserver_tests/
mcinfcallWSRU.stderrB.exp 31 gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
40 gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
49 gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
  /hardware/ti/wlan/wl1271/stad/src/Connection_Managment/
keyDerive.c 67 * Registers the function 'rsn_KeyDeriveRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
103 * Registers the function 'rsn_KeyDeriveRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
129 * Registers the function 'rsn_KeyDeriveRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
keyParser.c 65 * Registers the function 'rsn_keyParserRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
99 * Registers the function 'rsn_keyParserRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
125 * Registers the function 'rsn_keyParserRecv()' at the distributor to receive KEY frames upon receiving a KEY_RECV event.
  /dalvik/vm/mterp/armv5te/
header.S 38 is present, registers s16-s31 (a/k/a d8-d15, a/k/a q4-q7) must be preserved,
42 registers are placed on the stack. "sp" points at the first stacked argument
54 The following registers have fixed assignments:
65 unspecified registers or condition codes.
68 /* single-purpose registers, given names for clarity */
124 * src and dest registers are parameterized (not hard-wired to rPC and rINST).
  /external/kernel-headers/original/asm-mips/ip32/
mace.h 120 /* Following are read-only registers for debugging */
133 /* Audio registers */
180 /* ISA Control and DMA registers */
235 /* Keyboard & Mouse registers
249 /* I2C registers
263 /* Timer registers */
  /external/llvm/lib/CodeGen/
RegAllocBase.h 28 // coloring, instead driving the assignment of virtual to physical registers by
30 // of registers, if a more sophisticated allocator chooses to do that.
62 // registers may have changed.
119 // Invalidate all cached information about virtual registers - live ranges may
130 /// enqueue - Add VirtReg to the priority queue of unassigned registers.
138 // or new set of split live virtual registers. It is up to the splitter to
  /external/llvm/lib/Target/PTX/
PTXMachineFunctionInfo.h 72 /// argreg_begin/argreg_end - Returns iterators to the set of registers
77 /// retreg_begin/retreg_end - Returns iterators to the set of registers
82 /// addRegister - Adds a virtual register to the set of all used registers
112 /// countRegisters - Returns the number of registers of the given type and
130 /// addRetReg - Adds a register to the set of return-value registers.
137 /// addArgReg - Adds a register to the set of function argument registers.
  /external/v8/src/
safepoint-table.cc 100 // Print the registers (if any).
196 ZoneList<int>* registers = registers_[i]; local
200 // Run through the registers (if any).
202 if (registers == NULL) {
208 for (int j = 0; j < registers->length(); j++) {
209 int index = registers->at(j);
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/
armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s 32 ;// Registers used as input for this function
35 ;// Registers preserved for top level function
38 ;// Registers modified by the function
41 ;// Output registers
45 ;// Declare input registers
51 ;// Declare inner loop registers
  /bionic/libc/arch-arm/include/
endian.h 49 * Rd and Rm must both be Lo registers.
52 * Rd and Rm must both be Lo registers.

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