| /external/llvm/lib/Target/X86/ |
| README-X86-64.txt | 172 1. We shouldn't spill the XMM registers because we only call va_arg with "int".
179 1. Conversely to the above, we shouldn't spill general registers if we only
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| /external/openssl/crypto/bn/asm/ |
| ia64-mont.pl | 389 stf.spill [sp]=f16,-16
391 stf.spill [r17]=f17,32
394 stf.spill [r16]=f18,32
396 stf.spill [r17]=f19,32
399 stf.spill [r16]=f20,32
401 stf.spill [r17]=f21,32
404 stf.spill [r16]=f22
406 stf.spill [r17]=f23
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| /external/webkit/Source/JavaScriptCore/dfg/ |
| DFGNode.h | 53 // Type for a virtual register number (spill location).
336 // The virtual register number (spill location) associated with this .
|
| /packages/apps/Gallery/res/values-nb/ |
| strings.xml | 59 <string name="camera_play" msgid="8248000517869959980">"Spill"</string>
66 <string name="video_play" msgid="5287787282508002895">"Spill"</string>
|
| /packages/apps/Music/res/values-nb/ |
| strings.xml | 38 <string name="play_all" msgid="6309622568869321842">"Spill alle"</string>
99 <string name="play_selection" msgid="2854921021814550018">"Spill"</string>
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| /external/llvm/lib/CodeGen/ |
| SplitKit.cpp | 347 // Reset the LiveRangeCalc instances needed for this spill mode.
554 // In spill mode, make live ranges as short as possible by inserting the copy
624 // Spill modes
[all...] |
| /dalvik/vm/arch/x86/ |
| Call386ABI.S | 89 /* Establish the frame pointer, spill & align to 16b */
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| /dalvik/vm/mterp/x86/ |
| OP_FILLED_NEW_ARRAY.S | 15 SPILL(rIBASE) # preserve rIBASE
|
| /external/llvm/docs/HistoricalNotes/ |
| 2003-06-26-Reoptimizer2.txt | 39 There is a problem with alloca: we cannot find our spill space for
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonTargetMachine.cpp | 135 // Expand Spill code for predicate registers.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCMachineFunctionInfo.h | 55 /// calls. Used for creating an area before the register spill area.
|
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 42 // 16 words for register window spill
|
| /external/llvm/lib/Transforms/Utils/ |
| LowerInvoke.cpp | 267 // we spill into a stack location, guaranteeing that there is nothing live
351 // and spill the value.
382 // If we decided we need a spill, do it.
423 // we spill into a stack location, guaranteeing that there is nothing live
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| /external/llvm/test/CodeGen/ARM/ |
| 2010-05-20-NEONSpillCrash.ll | 3 ; This test would crash the rewriter when trying to handle a spill after one of
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| fast-isel-intrinsic.ll | 40 ; ARM: str r0, [sp] @ 4-byte Spill
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| /external/llvm/test/CodeGen/CellSPU/ |
| vec_const.ll | 32 ; Spill to constant pool
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| /external/llvm/test/CodeGen/Thumb2/ |
| crash.ll | 52 ; Make sure the DPair register class can spill.
|
| /external/oprofile/module/ia64/ |
| oprofile_stubs.S | 95 stf.spill [sp]=f0
|
| /external/webkit/Source/WebCore/platform/ |
| Theme.h | 102 // Some controls may spill out of their containers (e.g., the check on an OS X checkbox). When these controls repaint,
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| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 494 // emergency spill slot.
891 // Assume that we'll have at least some spill slots allocated.
894 Offset += 128; // 128 bytes of spill slots
[all...] |
| README-Thumb.txt | 18 temporaries to spill values into.
187 These instructions preserve the condition code which is important if the spill
|
| /bionic/libc/arch-arm/bionic/ |
| memcpy.S | 203 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
320 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 173 // R10 is live-in. It is killed at the spill.
291 // Add the callee-saved register as live-in. It's killed at the spill.
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| /external/v8/src/ |
| lithium.h | 523 // Allocation index indexed arrays of spill slot operands for registers
524 // that are also in spill slots at an OSR entry. NULL for environments
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| /external/valgrind/main/coregrind/ |
| pub_core_threadstate.h | 104 guest state area, its two shadows, and the spill area, are
116 /* Spill area. */
|
