/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/install-tools/include/ |
limits.h | 64 #undef CHAR_BIT 73 #undef SCHAR_MIN 75 #undef SCHAR_MAX 79 #undef UCHAR_MAX 88 # undef CHAR_MIN 94 # undef CHAR_MAX 97 # undef CHAR_MIN 99 # undef CHAR_MAX 104 #undef SHRT_MIN 106 #undef SHRT_MA [all...] |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/lib/gcc/i686-linux/4.6.x-google/include-fixed/ |
limits.h | 64 #undef CHAR_BIT 73 #undef SCHAR_MIN 75 #undef SCHAR_MAX 79 #undef UCHAR_MAX 88 # undef CHAR_MIN 94 # undef CHAR_MAX 97 # undef CHAR_MIN 99 # undef CHAR_MAX 104 #undef SHRT_MIN 106 #undef SHRT_MA [all...] |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/lib/gcc/i686-linux/4.6.x-google/install-tools/include/ |
limits.h | 64 #undef CHAR_BIT 73 #undef SCHAR_MIN 75 #undef SCHAR_MAX 79 #undef UCHAR_MAX 88 # undef CHAR_MIN 94 # undef CHAR_MAX 97 # undef CHAR_MIN 99 # undef CHAR_MAX 104 #undef SHRT_MIN 106 #undef SHRT_MA [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/lib/gcc/x86_64-linux/4.6.x-google/include-fixed/ |
limits.h | 64 #undef CHAR_BIT 73 #undef SCHAR_MIN 75 #undef SCHAR_MAX 79 #undef UCHAR_MAX 88 # undef CHAR_MIN 94 # undef CHAR_MAX 97 # undef CHAR_MIN 99 # undef CHAR_MAX 104 #undef SHRT_MIN 106 #undef SHRT_MA [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/lib/gcc/x86_64-linux/4.6.x-google/install-tools/include/ |
limits.h | 64 #undef CHAR_BIT 73 #undef SCHAR_MIN 75 #undef SCHAR_MAX 79 #undef UCHAR_MAX 88 # undef CHAR_MIN 94 # undef CHAR_MAX 97 # undef CHAR_MIN 99 # undef CHAR_MAX 104 #undef SHRT_MIN 106 #undef SHRT_MA [all...] |
/external/llvm/test/CodeGen/ARM/ |
2009-11-13-VRRewriterCrash.ll | 14 %0 = load %bar** undef, align 4 ; <%bar*> [#uses=2] 18 br i1 undef, label %bb3.i, label %bb2.i 25 %2 = fsub float 0.000000e+00, undef ; <float> [#uses=1] 28 %5 = fsub float 0.000000e+00, undef ; <float> [#uses=1] 31 %8 = fsub float undef, undef ; <float> [#uses=1] 36 %13 = fmul float 0.000000e+00, undef ; <float> [#uses=1] 38 store float %14, float* undef 43 %18 = fadd float %17, undef ; <float> [#uses=1] 48 %23 = load float* undef, align 4 ; <float> [#uses=2 [all...] |
2012-01-24-RegSequenceLiveRange.ll | 10 %tmp = load <2 x float>* undef, align 8, !tbaa !0 12 %tmp3 = insertelement <4 x float> undef, float %tmp2, i32 0 21 %tmp12 = shufflevector <2 x i64> %tmp11, <2 x i64> undef, <1 x i32> zeroinitializer 23 %tmp14 = shufflevector <2 x float> %tmp13, <2 x float> undef, <4 x i32> zeroinitializer 25 %tmp16 = shufflevector <2 x i64> %tmp15, <2 x i64> undef, <1 x i32> zeroinitializer 28 tail call arm_aapcs_vfpcc void @bar(i8* undef, float %tmp18, float undef, float 0.000000e+00) nounwind 30 %tmp20 = shufflevector <2 x i64> %tmp19, <2 x i64> undef, <1 x i32> zeroinitializer 32 %tmp22 = shufflevector <2 x float> %tmp21, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 34 %tmp24 = shufflevector <2 x i64> %tmp23, <2 x i64> undef, <1 x i32> zeroinitialize [all...] |
2012-01-26-CopyPropKills.ll | 11 br i1 undef, label %bb1, label %bb2 17 br i1 undef, label %bb92, label %bb3 20 %tmp = or <4 x i32> undef, undef 26 %tmp9 = shufflevector <2 x i64> %tmp8, <2 x i64> undef, <1 x i32> zeroinitializer 28 %tmp11 = shufflevector <2 x i64> %tmp8, <2 x i64> undef, <1 x i32> <i32 1> 31 %tmp14 = shufflevector <2 x float> %tmp10, <2 x float> undef, <2 x i32> <i32 1, i32 2> 34 %tmp17 = shufflevector <2 x i64> %tmp16, <2 x i64> undef, <1 x i32> zeroinitializer 41 %tmp24 = shufflevector <1 x i64> %tmp23, <1 x i64> undef, <2 x i32> <i32 0, i32 1> 43 %tmp26 = shufflevector <2 x i64> %tmp16, <2 x i64> undef, <1 x i32> <i32 1 [all...] |
vlddup.ll | 8 %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0 9 %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer 18 %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0 19 %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer 28 %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0 29 %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer 37 %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 38 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer 47 %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0 48 %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitialize [all...] |
/external/llvm/test/CodeGen/X86/ |
2009-11-25-ImpDefBug.ll | 28 %0 = invoke i32 @_Z17LoadObjectFromBERR8xmstreamPP10ASN1ObjectPPF10ASN1StatusP13ASN1ObjHeaderS3_E(%struct.xmstream* undef, %struct.ASN1Object** undef, i32 (%struct.ASN1ObjHeader*, %struct.ASN1Object**)** undef) 32 br i1 undef, label %bb1.i.fragment.bbcl.disp, label %bb.i.i.bbcl.disp 35 invoke void @_ZNSt6vectorIP10ASN1ObjectSaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%"struct.std::ASN1ObjList"* undef, i64 undef, %struct.ASN1Object** undef) 39 br i1 undef, label %meshBB81.bbcl.disp, label %bb5 42 ret i32 undef 45 ret i32 undef [all...] |
block-placement.ll | 248 %cond1 = load volatile i1* undef 253 %cond2 = load volatile i1* undef 258 %cond3 = load volatile i1* undef 263 %cond4 = load volatile i1* undef 352 br i1 undef, label %loop.body3, label %loop.body2 355 %ptr = load i32** undef, align 4 359 %myptr = phi i32* [ %ptr2, %loop.body5 ], [ %ptr, %loop.body2 ], [ undef, %loop.body1 ] 366 br i1 undef, label %loop.header, label %loop.body5 369 %ptr2 = load i32** undef, align 4 395 %comp0 = icmp eq i32* undef, nul [all...] |
2010-01-19-OptExtBug.ll | 5 switch i8 undef, label %bb6 [ 17 br i1 undef, label %bb7, label %bb9 23 %0 = load i8* undef, align 1 ; <i8> [#uses=3] 24 br i1 undef, label %bb12, label %bb10 27 br i1 undef, label %bb12, label %bb11 33 br i1 undef, label %bb13, label %bb14 36 store i8 %0, i8* undef, align 1 44 %termcode.0 = phi i32 [ %1, %bb13 ], [ undef, %bb14 ] ; <i32> [#uses=2] 49 br i1 undef, label %bb21, label %bb20 55 %termcode.1 = phi i32 [ %termcode.0, %bb18 ], [ %termcode.0, %bb19 ], [ undef, %bb20 ] ; <i32> [#uses=0 [all...] |
2011-02-23-UnfoldBug.ll | 10 %theta.0.ph = phi <2 x double> [ undef, %entry ], [ %theta.1, %if.end71 ] 11 %mul.i97 = fmul <2 x double> %theta.0.ph, undef 12 %mul.i96 = fmul <2 x double> %mul.i97, fmul (<2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> undef) 13 br i1 undef, label %for.body, label %for.end82 16 br i1 undef, label %for.body33.lr.ph, label %for.end 19 %dccf.2 = select i1 undef, <2 x double> %mul.i96, <2 x double> undef 23 %vecins.i94 = insertelement <2 x double> undef, double 0.000000e+00, i32 0 26 br i1 undef, label %if.then67, label %if.end71 29 %vecins.i91 = insertelement <2 x double> %vecins.i94, double undef, i32 [all...] |
discontiguous-loops.ll | 11 switch i32 undef, label %bb18 [ 19 %tmp = icmp eq i8** undef, null ; <i1> [#uses=1] 26 store i32 0, i32* undef, align 8 27 br i1 undef, label %xbb6, label %bb5 34 %tmp7 = icmp slt i32 undef, 0 ; <i1> [#uses=1] 38 %tmp9 = icmp eq i8** undef, null ; <i1> [#uses=1] 42 %tmp11 = load i8** undef, align 8 ; <i8*> [#uses=1] 47 br i1 undef, label %bb15, label %ybb13 50 %tmp14 = icmp sgt i32 undef, 0 ; <i1> [#uses=1] 54 call void (i8*, ...)* @fatal(i8* getelementptr inbounds ([37 x i8]* @.str96, i64 0, i64 0), i8* undef) nounwin [all...] |
liveness-local-regalloc.ll | 16 switch i32 undef, label %.exit3 [ 22 br i1 undef, label %bb3, label %bb5 25 switch i32 undef, label %infloop [ 32 %tmp = add nsw i32 undef, 1 ; <i32> [#uses=1] 36 switch i32 undef, label %infloop1 [ 42 %.04 = phi i32 [ %tmp, %bb4 ], [ undef, %bb3 ], [ undef, %.exit3 ], [ undef, %bb5 ] ; <i32> [#uses=2] 43 br i1 undef, label %bb8, label %bb6 46 %tmp7 = tail call fastcc i32 @func(%0* %arg, i32 %.04, i32 undef) nounwind ssp ; <i32> [#uses=0 [all...] |
2009-07-16-CoalescerBug.ll | 15 br i1 undef, label %if.else, label %if.then91 24 br i1 undef, label %lor.lhs.false, label %if.then105 27 br i1 undef, label %if.else139, label %if.then105 33 br i1 undef, label %land.end, label %land.rhs 39 br i1 undef, label %land.lhs.true285, label %if.then315 42 br i1 undef, label %if.end324, label %if.then322 51 br i1 undef, label %if.end384, label %if.then358 57 br i1 undef, label %if.end394, label %land.lhs.true387 63 br i1 undef, label %if.end498, label %land.lhs.true399 66 br i1 undef, label %if.end498, label %if.then40 [all...] |
legalize-sub-zero.ll | 7 %1 = fdiv <3 x double> zeroinitializer, undef 8 %2 = fdiv <2 x double> zeroinitializer, undef 9 %3 = shufflevector <2 x double> %2, <2 x double> undef, <3 x i32> <i32 0, i32 10 1, i32 undef> 11 %4 = insertelement <3 x double> %3, double undef, i32 2 15 %8 = shufflevector <3 x i64> %7, <3 x i64> undef, <2 x i32> <i32 0, i32 1> 18 %11 = shufflevector <2 x i64> %10, <2 x i64> undef, <3 x i32> <i32 0, i32 1, 19 i32 undef> 21 %13 = shufflevector <3 x i64> %12, <3 x i64> undef, <4 x i32> <i32 0, i32 1, 23 %14 = shufflevector <4 x i64> %13, <4 x i64> undef, <2 x i32> <i32 0, i32 1 [all...] |
vec_anyext.ll | 5 %F = load <4 x i32>* undef 7 %H = load <4 x i32>* undef 10 store <4 x i16>%T , <4 x i16>* undef 15 %F = load <4 x i64>* undef 17 %H = load <4 x i64>* undef 20 store <4 x i16>%T , <4 x i16>* undef 25 %F = load <4 x i64>* undef 27 %H = load <4 x i64>* undef 34 %F = load <4 x i16>* undef 36 %H = load <4 x i16>* undef [all...] |
vec_sext.ll | 5 %F = load <4 x i16>* undef 7 %H = load <4 x i16>* undef 10 store <4 x i32>%T , <4 x i32>* undef 15 %F = load <4 x i16>* undef 17 %H = load <4 x i16>* undef 20 store <4 x i64>%T , <4 x i64>* undef 25 %F = load <4 x i32>* undef 27 %H = load <4 x i32>* undef 34 %F = load <4 x i8>* undef 36 %H = load <4 x i8>* undef [all...] |
/external/llvm/test/Transforms/LoopStrengthReduce/ |
2012-01-16-nopreheader.ll | 21 %s.1 = phi i8* [ undef, %if.end434 ], [ %incdec.ptr356, %if.end348 ], [ undef, %entry ] 22 indirectbr i8* undef, [label %land.rhs184, label %while.end453] 25 indirectbr i8* undef, [label %while.end453, label %while.cond197] 29 indirectbr i8* undef, [label %land.rhs202, label %while.end215] 33 indirectbr i8* undef, [label %while.end215, label %while.cond197] 36 indirectbr i8* undef, [label %PREMATURE, label %if.end221] 39 indirectbr i8* undef, [label %while.cond238.preheader, label %lor.lhs.false227] 42 indirectbr i8* undef, [label %while.cond238.preheader, label %if.else] 46 indirectbr i8* undef, [label %while.cond238 [all...] |
/external/llvm/test/CodeGen/Thumb2/ |
2010-03-08-addi12-ccout.ll | 17 br i1 undef, label %bb, label %bb2 20 br i1 undef, label %bb2, label %bb3 27 br i1 undef, label %bb19, label %bb20 33 br i1 undef, label %bb25, label %bb26 40 br i1 undef, label %bb.nph508, label %bb49 46 br i1 undef, label %bb51, label %bb50 49 br i1 undef, label %bb51, label %bb104 55 br i1 undef, label %bb106, label %bb105 58 br i1 undef, label %bb106, label %bb161 67 br i1 undef, label %bb163, label %bb22 [all...] |
/external/llvm/test/Transforms/IndVarSimplify/ |
loop_evaluate7.ll | 9 br i1 undef, label %bb33, label %bb1 12 br i1 undef, label %overflow1, label %bb15 15 br i1 undef, label %bb33, label %bb17 21 br i1 undef, label %bb20, label %bb29 24 %0 = load i32* undef, align 4 ; <i32> [#uses=1] 38 %q.0 = phi i8* [ undef, %bb20 ], [ %3, %bb22 ] ; <i8*> [#uses=3] 44 %q.1 = phi i8* [ undef, %bb19 ], [ %q.0, %bb23 ] ; <i8*> [#uses=0] 48 br i1 undef, label %bb19, label %bb33 51 br i1 undef, label %bb32, label %overflow1 60 ret i8* undef [all...] |
/prebuilts/ndk/android-ndk-r6/sources/cxx-stl/gnu-libstdc++/libs/x86/include/bits/ |
c++config.h | 208 #undef _GLIBCXX_LONG_DOUBLE_COMPAT 232 # undef _GLIBCXX_BEGIN_NAMESPACE 233 # undef _GLIBCXX_END_NAMESPACE 314 #undef min 315 #undef max 325 /* #undef _GLIBCXX_HAVE_ACOSL */ 331 /* #undef _GLIBCXX_HAVE_ASINL */ 340 /* #undef _GLIBCXX_HAVE_ATAN2L */ 346 /* #undef _GLIBCXX_HAVE_ATANL */ 349 /* #undef _GLIBCXX_HAVE_CC_TLS * [all...] |
/external/freetype/include/freetype/ |
fterrors.h | 68 /* #undef __FTERRORS_H__ */ 102 #undef FT_NEED_EXTERN_C 104 #undef FT_ERR_XCAT 105 #undef FT_ERR_CAT 129 #undef FT_ERR_BASE 187 #undef FT_ERROR_START_LIST 188 #undef FT_ERROR_END_LIST 190 #undef FT_ERRORDEF 191 #undef FT_ERRORDEF_ 192 #undef FT_NOERRORDEF [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
vec_buildvector_loadstore.ll | 13 %tmp181.i = insertelement <16 x i8> <i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp180.i, i32 2 ; <<16 x i8>> [#uses=1 [all...] |