| /external/llvm/test/CodeGen/Mips/ |
| 2008-07-07-Float2Int.ll | 6 fptosi float %a to i32 ; <i32>:0 [#uses=1]
15 fptoui float %a to i32 ; <i32>:0 [#uses=1]
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| 2008-07-16-SignExtInReg.ll | 7 add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
14 add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
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| 2008-07-22-Cstpool.ll | 10 fadd float %a, 0x4011333340000000 ; <float>:0 [#uses=1]
11 fadd float %0, 0x4010666660000000 ; <float>:1 [#uses=1]
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| /external/llvm/test/CodeGen/PowerPC/ |
| 2005-09-02-LegalizeDuplicatesCalls.ll | 7 %mem_tmp.2.0.in = fptosi double %tmp.7705 to i64 ; <i64> [#uses=1]
8 %mem_tmp.2.0 = sitofp i64 %mem_tmp.2.0.in to double ; <double> [#uses=1]
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| 2006-04-05-splat-ish.ll | 5 %tmp = load <8 x i16>* %P ; <<8 x i16>> [#uses=1]
6 %tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 > ; <<8 x i16>> [#uses=1]
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| 2007-02-23-lr-saved-twice.ll | 5 @str = internal constant [18 x i8] c"hello world!, %d\0A\00" ; <[18 x i8]*> [#uses=1]
10 %tmp = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0]
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| 2008-04-16-CoalescerBug.ll | 4 @llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 (i64)* @_Z13GetSectorSizey to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
10 %tmp10 = and i64 0, %Base ; <i64> [#uses=0]
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| 2008-05-01-ppc_fp128.ll | 9 %tmp124 = fcmp ord ppc_fp128 %b, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
10 %tmp140 = and i1 %tmp124, fcmp une (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000) ; <i1> [#uses=0]
|
| 2009-11-25-ImpDefBug.ll | 20 %0 = fcmp olt float undef, 0.000000e+00 ; <i1> [#uses=2]
21 %eTop.eMaj = select i1 %0, %struct..0EdgeT* undef, %struct..0EdgeT* null ; <%struct..0EdgeT*> [#uses=1]
43 %eRight.08 = phi %struct..0EdgeT* [ %eTop.eMaj, %bb32 ], [ undef, %bb34 ], [ undef, %bb33 ] ; <%struct..0EdgeT*> [#uses=0]
44 %fdgOuter.0 = phi i32 [ %fdgOuter.1, %bb32 ], [ undef, %bb34 ], [ %fdgOuter.1, %bb33 ] ; <i32> [#uses=1]
45 %fz.3 = phi i32 [ %fz.2, %bb32 ], [ 2147483647, %bb34 ], [ %fz.2, %bb33 ] ; <i32> [#uses=1]
46 %1 = add i32 undef, 1 ; <i32> [#uses=0]
50 %fdgOuter.1 = phi i32 [ undef, %bb17 ], [ %fdgOuter.0, %bb38 ] ; <i32> [#uses=2]
51 %fz.2 = phi i32 [ undef, %bb17 ], [ %fz.3, %bb38 ] ; <i32> [#uses=2]
|
| vec_call.ll | 4 %C = add <4 x i32> %A, %B ; <<4 x i32>> [#uses=1]
9 %X = call <4 x i32> @test_arg( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
|
| vec_constants.ll | 4 %tmp = load <4 x i32>* %P1 ; <<4 x i32>> [#uses=1]
5 %tmp4 = and <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
7 %tmp7 = load <4 x i32>* %P2 ; <<4 x i32>> [#uses=1]
8 %tmp9 = and <4 x i32> %tmp7, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1]
10 %tmp.upgrd.1 = load <4 x float>* %P3 ; <<4 x float>> [#uses=1]
11 %tmp11 = bitcast <4 x float> %tmp.upgrd.1 to <4 x i32> ; <<4 x i32>> [#uses=1]
12 %tmp12 = and <4 x i32> %tmp11, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1]
13 %tmp13 = bitcast <4 x i32> %tmp12 to <4 x float> ; <<4 x float>> [#uses=1]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-08-07-CoalescerBug.ll | 12 %0 = call arm_aapcs_vfpcc float @bar(%c* %y) ; <float> [#uses=0]
13 %1 = fadd float undef, undef ; <float> [#uses=1]
|
| tls1.ll | 9 @i = thread_local global i32 15 ; <i32*> [#uses=2]
13 %tmp1 = load i32* @i ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| 2004-02-13-FrameReturnAddress.ll | 10 %X = call i8* @llvm.returnaddress( i32 0 ) ; <i8*> [#uses=1]
15 %X = call i8* @llvm.frameaddress( i32 0 ) ; <i8*> [#uses=1]
|
| 2006-05-22-FPSetEQ.ll | 6 %tmp = fcmp oeq float %f, 0.000000e+00 ; <i1> [#uses=1]
7 %tmp.upgrd.1 = zext i1 %tmp to i32 ; <i32> [#uses=1]
|
| 2009-02-09-ivs-different-sizes.ll | 9 %shift.0 = select i1 false, i32 4, i32 2 ; <i32> [#uses=1]
19 %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2]
20 %ch.6.in.in = phi i8* [ %p_addr.6, %bb62 ], [ null, %bb54 ] ; <i8*> [#uses=0]
21 %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1]
22 %frac_bits.0 = mul i32 %indvar202, %shift.0 ; <i32>[#uses=1]
23 %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2]
24 %p_addr.6 = getelementptr i8* null, i64 %p_addr.6.rec ; <i8*>[#uses=1]
31 %frac_bits.1 = phi i32 [ 0, %bb54 ], [ %frac_bits.0, %bb56 ] ; <i32> [#uses=0]
|
| 2009-10-19-atomic-cmp-eflags.ll | 7 @.str76843 = external constant [45 x i8] ; <[45 x i8]*> [#uses=1]
8 @__profiling_callsite_timestamps_live = external global [1216 x i64] ; <[1216 x i64]*> [#uses=2]
12 %retval.i = alloca i32 ; <i32*> [#uses=3]
13 %retval = alloca i32 ; <i32*> [#uses=2]
14 %initoptions.addr = alloca i32 ; <i32*> [#uses=2]
16 %0 = tail call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
18 %1 = bitcast i32* %initoptions.addr to { }* ; <{ }*> [#uses=0]
20 %2 = call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
21 %call.i = call i32 @lt_dlinit() nounwind ; <i32> [#uses=1]
22 %tobool.i = icmp ne i32 %call.i, 0 ; <i1> [#uses=1
[all...] |
| 2009-11-04-SubregCoalescingBug.ll | 9 %0 = add i32 %a, 15 ; <i32> [#uses=1]
10 %1 = zext i32 %0 to i64 ; <i64> [#uses=1]
|
| 2010-02-23-DAGCombineBug.ll | 8 %cmp = icmp slt i32 undef, 0 ; <i1> [#uses=1]
9 %outsearch.0 = select i1 %cmp, i1 false, i1 true ; <i1> [#uses=1]
|
| 2010-06-28-matched-g-constraint.ll | 7 %_r = alloca i32, align 4 ; <i32*> [#uses=2]
9 %0 = load i32* %_r, align 4 ; <i32> [#uses=1]
|
| 3addr-or.ll | 8 %0 = shl i32 %x, 5 ; <i32> [#uses=1]
9 %1 = or i32 %0, 3 ; <i32> [#uses=1]
20 %C = zext i8 %A to i64 ; <i64> [#uses=1]
21 %D = shl i64 %C, 4 ; <i64> [#uses=1]
22 %E = and i64 %D, 48 ; <i64> [#uses=1]
23 %F = zext i8 %B to i64 ; <i64> [#uses=1]
24 %G = lshr i64 %F, 4 ; <i64> [#uses=1]
25 %H = or i64 %G, %E ; <i64> [#uses=1]
|
| darwin-stub.ll | 4 @"\01LC" = internal constant [13 x i8] c"Hello World!\00" ; <[13 x i8]*> [#uses=1]
8 %0 = tail call i32 @puts(i8* getelementptr ([13 x i8]* @"\01LC", i32 0, i32 0)) nounwind ; <i32> [#uses=0]
|
| imul-lea-2.ll | 7 %0 = mul i64 %a, 81 ; <i64> [#uses=1]
13 %0 = mul i64 %a, 40 ; <i64> [#uses=1]
|
| insertelement-legalize.ll | 6 %tmp4 = insertelement <2 x i64> %val, i64 %x, i32 0 ; <<2 x i64>> [#uses=1]
7 %add = add <2 x i64> %tmp4, %val ; <<2 x i64>> [#uses=1]
|
| longlong-deadload.ll | 9 %tmp1 = load i64* %P, align 8 ; <i64> [#uses=1]
10 %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1]
|
