| /external/llvm/test/CodeGen/Generic/ |
| print-shift.ll | 3 @a_str = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
4 @b_str = internal constant [8 x i8] c"b = %d\0A\00" ; <[8 x i8]*> [#uses=1]
5 @a_shl_str = internal constant [14 x i8] c"a << %d = %d\0A\00" ; <[14 x i8]*> [#uses=1]
6 @A = global i32 2 ; <i32*> [#uses=1]
7 @B = global i32 5 ; <i32*> [#uses=1]
13 %a = load i32* @A ; <i32> [#uses=2]
14 %b = load i32* @B ; <i32> [#uses=1]
15 %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
16 %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
17 %a_shl_s = getelementptr [14 x i8]* @a_shl_str, i64 0, i64 0 ; <i8*> [#uses=1
[all...] |
| 2005-12-01-Crash.ll | 2 @str = external global [36 x i8] ; <[36 x i8]*> [#uses=0]
3 @str.upgrd.1 = external global [29 x i8] ; <[29 x i8]*> [#uses=0]
4 @str1 = external global [29 x i8] ; <[29 x i8]*> [#uses=0]
5 @str2 = external global [29 x i8] ; <[29 x i8]*> [#uses=1]
6 @str.upgrd.2 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
7 @str3 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
8 @str4 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
9 @str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
13 %tmp17 = sext i8 %a13 to i32 ; <i32> [#uses=1]
14 %tmp23 = call i32 (i8*, ...)* @printf( i8* getelementptr ([29 x i8]* @str2, i32 0, i64 0), i32 %a11, double 0.000000e+00, i32 %tmp17, double %a14, i32 0 ) ; <i32> [#uses=0
[all...] |
| 2006-07-03-schedulers.ll | 15 %x1 = fmul float %x, %y ; <float> [#uses=1]
16 %y1 = fmul float %y, 7.500000e-01 ; <float> [#uses=1]
17 %z1 = fadd float %x1, %y1 ; <float> [#uses=1]
18 %x2 = fmul float %x, 5.000000e-01 ; <float> [#uses=1]
19 %y2 = fmul float %y, 0x3FECCCCCC0000000 ; <float> [#uses=1]
20 %z2 = fadd float %x2, %y2 ; <float> [#uses=1]
21 %z3 = fadd float %z1, %z2 ; <float> [#uses=1]
22 %i1 = shl i32 %i, 3 ; <i32> [#uses=1]
23 %j1 = add i32 %i, 7 ; <i32> [#uses=1]
24 %m1 = add i32 %i1, %j1 ; <i32> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| rotl-2.ll | 6 %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
7 %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1]
8 %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
9 %shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
10 %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1]
11 %D = or i32 %B, %C ; <i32> [#uses=1]
16 %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1]
17 %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1]
18 %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
19 %shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1
[all...] |
| ppcf128-1.ll | 8 %x_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
9 %y_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
10 %retval = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
11 %tmp = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
12 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
15 %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1]
16 %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1]
17 %tmp3 = fadd ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1]
19 %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1]
24 %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1
[all...] |
| rlwinm2.ll | 12 %tmp = trunc i32 %Y to i8 ; <i8> [#uses=2]
13 %tmp1 = shl i32 %X, %Y ; <i32> [#uses=1]
14 %tmp2 = sub i32 32, %Y ; <i8> [#uses=1]
15 %tmp3 = lshr i32 %X, %tmp2 ; <i32> [#uses=1]
16 %tmp4 = or i32 %tmp1, %tmp3 ; <i32> [#uses=1]
17 %tmp6 = and i32 %tmp4, 127 ; <i32> [#uses=1]
23 %tmp1 = lshr i32 %X, 27 ; <i32> [#uses=1]
24 %tmp2 = shl i32 %X, 5 ; <i32> [#uses=1]
25 %tmp2.masked = and i32 %tmp2, 96 ; <i32> [#uses=1]
26 %tmp5 = or i32 %tmp1, %tmp2.masked ; <i32> [#uses=1
[all...] |
| rlwimi-commute.ll | 7 %A.upgrd.1 = load i32* %A ; <i32> [#uses=2]
8 %B.upgrd.2 = load i32* %B ; <i32> [#uses=1]
9 %X = and i32 %A.upgrd.1, 15 ; <i32> [#uses=1]
10 %Y = and i32 %B.upgrd.2, -16 ; <i32> [#uses=1]
11 %Z = or i32 %X, %Y ; <i32> [#uses=1]
18 %A.upgrd.3 = load i32* %A ; <i32> [#uses=1]
19 %B.upgrd.4 = load i32* %B ; <i32> [#uses=2]
20 %X = and i32 %A.upgrd.3, 15 ; <i32> [#uses=1]
21 %Y = and i32 %B.upgrd.4, -16 ; <i32> [#uses=1]
22 %Z = or i32 %X, %Y ; <i32> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-09-01-PostRAProlog.ll | 6 @history = internal global [2 x [56 x i32]] [[56 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0], [56 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0]] ; <[2 x [56 x i32]]*> [#uses=3]
7 @nodes = internal global i64 0 ; <i64*> [#uses=4]
8 @.str = private constant [9 x i8] c"##-<=>+#\00", align 1 ; <[9 x i8]*> [#uses=2]
9 @.str1 = private constant [6 x i8] c"%c%d\0A\00", align 1 ; <[6 x i8]*> [#uses=1]
10 @.str2 = private constant [16 x i8] c"Fhourstones 2.0\00", align 1 ; <[16 x i8]*> [#uses=1]
11 @.str3 = private constant [54 x i8] c"Using %d transposition table entries with %d probes.\0A\00", align 1 ; <[54 x i8]*> [#uses=1]
12 @.str4 = private constant [31 x i8] c"Solving %d-ply position after \00", align 1 ; <[31 x i8]*> [#uses=1]
13 @.str5 = private constant [7 x i8] c" . . .\00", align 1 ; <[7 x i8]*> [#uses=1]
14 @.str6 = private constant [28 x i8] c"score = %d (%c) work = %d\0A\00", align 1 ; <[28 x i8]*> [#uses=1]
15 @.str7 = private constant [36 x i8] c"%lu pos / %lu msec = %.1f Kpos/sec\0A\00", align 1 ; <[36 x i8]*> [#uses=1
[all...] |
| thumb2-mulhi.ll | 6 %tmp = sext i32 %x to i64 ; <i64> [#uses=1]
7 %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1]
8 %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
9 %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
10 %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
17 %tmp = zext i32 %x to i64 ; <i64> [#uses=1]
18 %tmp1 = zext i32 %y to i64 ; <i64> [#uses=1]
19 %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
20 %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
21 %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1
[all...] |
| thumb2-smul.ll | 3 @x = weak global i16 0 ; <i16*> [#uses=1]
4 @y = weak global i16 0 ; <i16*> [#uses=0]
9 %tmp = load i16* @x ; <i16> [#uses=1]
10 %tmp1 = add i16 %tmp, 2 ; <i16> [#uses=1]
11 %tmp2 = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
12 %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
13 %tmp4 = mul i32 %tmp2, %tmp3 ; <i32> [#uses=1]
20 %tmp1 = ashr i32 %x, 16 ; <i32> [#uses=1]
21 %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
22 %tmp4 = mul i32 %tmp3, %tmp1 ; <i32> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2008-01-16-InvalidDAGCombineXform.ll | 7 %tmp1 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
8 %tmp2 = getelementptr %struct.node_t* %tmp1, i32 0, i32 4 ; <double**> [#uses=1]
9 %tmp3 = load double** %tmp2, align 4 ; <double*> [#uses=1]
10 %tmp4 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
11 %tmp5 = getelementptr %struct.node_t* %tmp4, i32 0, i32 4 ; <double**> [#uses=1]
13 %tmp6 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
14 %tmp7 = getelementptr %struct.node_t* %tmp6, i32 0, i32 3 ; <double***> [#uses=1]
15 %tmp8 = load double*** %tmp7, align 4 ; <double**> [#uses=1]
16 %tmp9 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
17 %tmp10 = getelementptr %struct.node_t* %tmp9, i32 0, i32 3 ; <double***> [#uses=1
[all...] |
| 2009-11-16-MachineLICM.ll | 4 @g = common global [4 x float] zeroinitializer, align 16 ; <[4 x float]*> [#uses=4]
9 %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
14 %tmp = zext i32 %n to i64 ; <i64> [#uses=1]
19 %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=2]
20 %tmp9 = shl i64 %indvar, 2 ; <i64> [#uses=4]
21 %tmp1016 = or i64 %tmp9, 1 ; <i64> [#uses=1]
22 %scevgep = getelementptr float* %x, i64 %tmp1016 ; <float*> [#uses=1]
23 %tmp1117 = or i64 %tmp9, 2 ; <i64> [#uses=1]
24 %scevgep12 = getelementptr float* %x, i64 %tmp1117 ; <float*> [#uses=1]
25 %tmp1318 = or i64 %tmp9, 3 ; <i64> [#uses=1
[all...] |
| shift-double.ll | 5 %shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
6 %Y = shl i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
11 %shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1]
12 %Y = ashr i64 %X, %shift.upgrd.2 ; <i64> [#uses=1]
17 %shift.upgrd.3 = zext i8 %C to i64 ; <i64> [#uses=1]
18 %Y = lshr i64 %X, %shift.upgrd.3 ; <i64> [#uses=1]
23 %shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
24 %X = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
25 %Cv = sub i8 32, %C ; <i8> [#uses=1]
26 %shift.upgrd.5 = zext i8 %Cv to i32 ; <i32> [#uses=1
[all...] |
| 2007-03-16-InlineAsm.ll | 7 %A_addr = alloca i32 ; <i32*> [#uses=2]
8 %B_addr = alloca i32 ; <i32*> [#uses=1]
9 %retval = alloca i32, align 4 ; <i32*> [#uses=2]
10 %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
11 %ret = alloca i32, align 4 ; <i32*> [#uses=2]
14 %tmp1 = load i32* %A_addr ; <i32> [#uses=1]
15 %tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 ) ; <i32> [#uses=1]
17 %tmp3 = load i32* %ret ; <i32> [#uses=1]
19 %tmp4 = load i32* %tmp ; <i32> [#uses=1]
24 %retval5 = load i32* %retval ; <i32> [#uses=1
[all...] |
| 2008-06-13-VolatileLoadStore.ll | 4 @atomic = global double 0.000000e+00 ; <double*> [#uses=1]
5 @atomic2 = global double 0.000000e+00 ; <double*> [#uses=1]
6 @anything = global i64 0 ; <i64*> [#uses=1]
7 @ioport = global i32 0 ; <i32*> [#uses=2]
10 %b = bitcast i64 %x to double ; <double> [#uses=1]
13 %b2 = bitcast double %y to i64 ; <i64> [#uses=1]
16 %t = trunc i32 %l to i16 ; <i16> [#uses=1]
18 %tmp = lshr i32 %l2, 16 ; <i32> [#uses=1]
19 %t2 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
20 %f = add i16 %t, %t2 ; <i16> [#uses=1
[all...] |
| 2008-10-07-SSEISelBug.ll | 5 %retval = alloca <4 x float> ; <<4 x float>*> [#uses=2]
6 %w.addr = alloca float ; <float*> [#uses=2]
7 %.compoundliteral = alloca <4 x float> ; <<4 x float>*> [#uses=2]
9 %tmp = load float* %w.addr ; <float> [#uses=1]
10 %0 = insertelement <4 x float> undef, float %tmp, i32 0 ; <<4 x float>> [#uses=1]
11 %1 = insertelement <4 x float> %0, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
12 %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
13 %3 = insertelement <4 x float> %2, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
15 %tmp1 = load <4 x float>* %.compoundliteral ; <<4 x float>> [#uses=1]
20 %4 = load <4 x float>* %retval ; <<4 x float>> [#uses=1
[all...] |
| 2006-05-02-InstrSched1.ll | 4 @size20 = external global i32 ; <i32*> [#uses=1]
5 @in5 = external global i8* ; <i8**> [#uses=1]
8 %tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
9 %tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
10 %tmp.upgrd.1 = load i32* @size20 ; <i32> [#uses=1]
11 %tmp.upgrd.2 = load i8** @in5 ; <i8*> [#uses=2]
12 %tmp3 = load i32* %tmp1 ; <i32> [#uses=1]
13 %gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
14 %tmp4 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
15 %tmp7 = load i32* %tmp ; <i32> [#uses=1
[all...] |
| 2007-11-06-InstrSched.ll | 5 %tmp2132 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
9 %i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp17, %bb18 ] ; <i32> [#uses=3]
10 %res.0.reg2mem.0 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; <float> [#uses=1]
11 %tmp3 = getelementptr i32* %x, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
12 %tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
13 %tmp45 = sitofp i32 %tmp4 to float ; <float> [#uses=1]
14 %tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; <float*> [#uses=1]
15 %tmp9 = load float* %tmp8, align 4 ; <float> [#uses=1]
16 %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
17 %tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2
[all...] |
| 2008-10-13-CoalescerBug.ll | 6 %0 = tail call i32 (...)* @func_43(i32 1) nounwind ; <i32> [#uses=1]
7 %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
14 %p_79_addr.0 = phi i8 [ 0, %bb ], [ %p_79, %entry ] ; <i8> [#uses=1]
15 %2 = zext i8 %p_79_addr.0 to i32 ; <i32> [#uses=2]
16 %3 = zext i1 false to i32 ; <i32> [#uses=2]
17 %4 = tail call i32 (...)* @rshift_u_s(i32 1) nounwind ; <i32> [#uses=0]
18 %5 = lshr i32 %2, %2 ; <i32> [#uses=3]
19 %6 = icmp eq i32 0, 0 ; <i1> [#uses=1]
23 %7 = ashr i32 %5, %3 ; <i32> [#uses=1]
24 %8 = icmp eq i32 %7, 0 ; <i1> [#uses=1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| and-or-not.ll | 11 %tmp3 = or i32 %b, %a ; <i32> [#uses=1]
12 %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1]
13 %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
14 %tmp7 = or i32 %tmp6, %tmp3not ; <i32> [#uses=1]
15 %tmp7not = xor i32 %tmp7, -1 ; <i32> [#uses=1]
21 %tmp3 = or i32 %b, %a ; <i32> [#uses=1]
22 %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
23 %tmp6not = xor i32 %tmp6, -1 ; <i32> [#uses=1]
24 %tmp7 = and i32 %tmp3, %tmp6not ; <i32> [#uses=1]
30 %tmp3 = or <4 x i32> %a, %b ; <<4 x i32>> [#uses=1
[all...] |
| bit-tracking.ll | 8 %ELIMinc = and i32 %B, 1 ; <i32> [#uses=1]
9 %tmp.5 = xor i32 %ELIMinc, 1 ; <i32> [#uses=1]
10 %ELIM7 = and i32 %B, -2 ; <i32> [#uses=1]
11 %tmp.8 = or i32 %tmp.5, %ELIM7 ; <i32> [#uses=1]
18 %ELIM3 = shl i32 %B, 31 ; <i32> [#uses=1]
19 %ELIM4 = ashr i32 %ELIM3, 31 ; <i32> [#uses=1]
20 %inc = add i32 %ELIM4, 1 ; <i32> [#uses=1]
21 %ELIM5 = and i32 %inc, 1 ; <i32> [#uses=1]
22 %ELIM7 = and i32 %B, -2 ; <i32> [#uses=1]
23 %tmp.8 = or i32 %ELIM5, %ELIM7 ; <i32> [#uses=1
[all...] |
| /packages/apps/Nfc/ |
| AndroidManifest.xml | 7 <uses-permission android:name="android.permission.BLUETOOTH" />
8 <uses-permission android:name="android.permission.BLUETOOTH_ADMIN" />
9 <uses-permission android:name="android.permission.NFC" />
10 <uses-permission android:name="android.permission.RECEIVE_BOOT_COMPLETED" />
11 <uses-permission android:name="android.permission.STATUS_BAR" />
12 <uses-permission android:name="android.permission.WRITE_SECURE_SETTINGS" />
13 <uses-permission android:name="android.permission.WAKE_LOCK" />
14 <uses-permission android:name="android.permission.STOP_APP_SWITCHES" />
15 <uses-permission android:name="android.permission.MASTER_CLEAR" />
16 <uses-permission android:name="android.permission.GET_TASKS" /
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| fixunsdfdi.ll | 6 %x14 = bitcast double %x to i64 ; <i64> [#uses=1]
13 %u.in.mask = and i64 %x14, -4294967296 ; <i64> [#uses=1]
14 %.ins = or i64 0, %u.in.mask ; <i64> [#uses=1]
15 %0 = bitcast i64 %.ins to double ; <double> [#uses=1]
16 %1 = fsub double %x, %0 ; <double> [#uses=1]
17 %2 = fptosi double %1 to i32 ; <i32> [#uses=1]
18 %3 = add i32 %2, 0 ; <i32> [#uses=1]
19 %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
20 %5 = shl i64 %4, 32 ; <i64> [#uses=1]
21 %6 = or i64 %5, 0 ; <i64> [#uses=1
[all...] |
| ldr_post.ll | 7 %tmp1 = mul i32 %a, %b ; <i32> [#uses=2]
8 %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
9 %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
10 %tmp4 = sub i32 %tmp1, %c ; <i32> [#uses=1]
11 %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1]
19 %tmp1 = mul i32 %a, %b ; <i32> [#uses=2]
20 %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
21 %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
22 %tmp4 = sub i32 %tmp1, 16 ; <i32> [#uses=1]
23 %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/CPP/ |
| 2009-05-04-CondBr.ll | 6 %retval = alloca i32 ; <i32*> [#uses=2]
7 %a.addr = alloca i32 ; <i32*> [#uses=8]
9 %tmp = load i32* %a.addr ; <i32> [#uses=1]
10 %inc = add i32 %tmp, 1 ; <i32> [#uses=1]
12 %tmp1 = load i32* %a.addr ; <i32> [#uses=1]
13 %cmp = icmp slt i32 %tmp1, 3 ; <i1> [#uses=1]
21 %tmp2 = load i32* %a.addr ; <i32> [#uses=1]
22 %inc3 = add i32 %tmp2, 1 ; <i32> [#uses=1]
24 %tmp4 = load i32* %a.addr ; <i32> [#uses=1]
26 %0 = load i32* %retval ; <i32> [#uses=1
[all...] |
