| /sdk/manifmerger/tests/src/com/android/manifmerger/data/ |
| 33_uses_sdk_minsdk_conflict.xml | 2 # Test uses-sdk: it's an error for a library to require a minSdkVersion higher than the
5 # Also a uses-sdk with a lack of minSdkVersion is equivalent to using version=1.
19 <uses-sdk android:targetSdkVersion="14" />
31 <uses-sdk android:minSdkVersion="4" />
40 <uses-sdk android:minSdkVersion="10" />
49 <uses-sdk android:minSdkVersion="11" />
59 <uses-sdk android:minSdkVersion="abcd" />
69 <uses-sdk android:minSdkVersion="123456789123456789" />
79 <uses-sdk android:minSdkVersion="0xFFFFFFFFFFFFFFFF" />
93 <uses-sdk android:targetSdkVersion="14" /
[all...] |
| /external/llvm/test/Analysis/Profiling/ |
| edge-profiling.ll | 6 @.str = private constant [12 x i8] c"hello world\00", align 1 ; <[12 x i8]*> [#uses=1]
7 @.str1 = private constant [6 x i8] c"franz\00", align 1 ; <[6 x i8]*> [#uses=1]
8 @.str2 = private constant [9 x i8] c"argc > 2\00", align 1 ; <[9 x i8]*> [#uses=1]
9 @.str3 = private constant [9 x i8] c"argc = 1\00", align 1 ; <[9 x i8]*> [#uses=1]
10 @.str4 = private constant [6 x i8] c"fritz\00", align 1 ; <[6 x i8]*> [#uses=1]
11 @.str5 = private constant [10 x i8] c"argc <= 1\00", align 1 ; <[10 x i8]*> [#uses=1]
32 %0 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
41 %argc_addr = alloca i32 ; <i32*> [#uses=4]
42 %argv_addr = alloca i8** ; <i8***> [#uses=1]
43 %retval = alloca i32 ; <i32*> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| lsr-normalization.ll | 11 @0 = private constant [13 x i8] c"Result: %lu\0A\00" ; <[13 x i8]*> [#uses=1]
12 @1 = internal constant [5 x i8] c"Huh?\00" ; <[5 x i8]*> [#uses=1]
16 %tmp = alloca %0, align 8 ; <%0*> [#uses=11]
17 %tmp2 = bitcast %0* %tmp to i8* ; <i8*> [#uses=1]
19 %tmp3 = getelementptr inbounds %0* %tmp, i64 0, i32 0 ; <%0**> [#uses=3]
21 %tmp4 = getelementptr inbounds %0* %tmp, i64 0, i32 1 ; <%0**> [#uses=1]
23 %tmp5 = call noalias i8* @_Znwm(i64 24) nounwind ; <i8*> [#uses=2]
24 %tmp6 = getelementptr inbounds i8* %tmp5, i64 16 ; <i8*> [#uses=2]
25 %tmp7 = icmp eq i8* %tmp6, null ; <i1> [#uses=1]
29 %tmp9 = bitcast i8* %tmp6 to i32* ; <i32*> [#uses=1
[all...] |
| 2006-05-01-SchedCausingSpills.ll | 7 %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
8 %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
9 %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
10 %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
11 %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
12 %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
13 %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
14 %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
15 %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
16 %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1
[all...] |
| 2008-02-27-PEICrash.ll | 11 %tmp36.pn = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
12 %b.pn509 = phi float [ %b, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
13 %a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; <float> [#uses=1]
14 %tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
15 %tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
16 %tmp44.pn = fmul float %tmp36.pn, %b.pn509 ; <float> [#uses=1]
17 %tmp46.pn = fadd float %tmp44.pn, %a.pn ; <float> [#uses=1]
18 %tmp53.pn = fsub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1]
19 %x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; <float> [#uses=1]
20 %y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; <float> [#uses=1
[all...] |
| 2008-04-16-CoalescerBug.ll | 12 %result.0.us = phi i32 [ %tmp93.us, %bb71.us ], [ 0, %bb53.us ] ; <i32> [#uses=2]
13 %tmp101.us = lshr i32 %result.0.us, 3 ; <i32> [#uses=1]
14 %result.0163.us = trunc i32 %result.0.us to i16 ; <i16> [#uses=2]
15 shl i16 %result.0163.us, 7 ; <i16>:0 [#uses=1]
16 %tmp106.us = and i16 %0, -1024 ; <i16> [#uses=1]
17 shl i16 %result.0163.us, 2 ; <i16>:1 [#uses=1]
18 %tmp109.us = and i16 %1, -32 ; <i16> [#uses=1]
19 %tmp111112.us = trunc i32 %tmp101.us to i16 ; <i16> [#uses=1]
20 %tmp110.us = or i16 %tmp109.us, %tmp111112.us ; <i16> [#uses=1]
21 %tmp113.us = or i16 %tmp110.us, %tmp106.us ; <i16> [#uses=1
[all...] |
| 2008-10-27-CoalescerBug.ll | 11 %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
12 %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
13 %0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
14 %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
23 %2 = load i32* null, align 4 ; <i32> [#uses=1]
24 %3 = mul i32 %2, 0 ; <i32> [#uses=1]
25 %4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
29 %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
30 %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
37 %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0
[all...] |
| vec_shuffle-18.ll | 7 %tmp9 = getelementptr %struct.vector4_t* %b, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
8 %tmp10 = load <4 x float>* %tmp9, align 16 ; <<4 x float>> [#uses=1]
9 %tmp14 = bitcast i8* %a to double* ; <double*> [#uses=1]
10 %tmp15 = load double* %tmp14 ; <double> [#uses=1]
11 %tmp16 = insertelement <2 x double> undef, double %tmp15, i32 0 ; <<2 x double>> [#uses=1]
12 %tmp18 = bitcast <2 x double> %tmp16 to <4 x float> ; <<4 x float>> [#uses=1]
13 %tmp19 = shufflevector <4 x float> %tmp10, <4 x float> %tmp18, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
15 %tmp28 = getelementptr %struct.vector4_t* %c, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
16 %tmp29 = load <4 x float>* %tmp28, align 16 ; <<4 x float>> [#uses=1]
17 %tmp26 = getelementptr i8* %a, i32 8 ; <i8*> [#uses=1
[all...] |
| /external/nist-sip/ |
| AndroidManifest.xml | 3 <uses-permission android:name="android.permission.WRITE_EXTERNAL_STORAGE" />
4 <uses-permission android:name="android.permission.INTERNET"></uses-permission>
5 <uses-permission android:name="android.permission.MODIFY_AUDIO_SETTINGS"></uses-permission>
6 <uses-permission android:name="android.permission.RECORD_AUDIO"></uses-permission>
7 <uses-permission android:name="android.permission.PROCESS_OUTGOING_CALLS"></uses-permission>
8 <uses-permission android:name="android.permission.WRITE_SETTINGS"></uses-permission
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2009-06-22-CoalescerBug.ll | 8 %tmp121 = load i64* null, align 4 ; <i64> [#uses=1]
9 %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; <i64*> [#uses=1]
10 %tmp122 = load i64* %0, align 4 ; <i64> [#uses=1]
11 %1 = zext i64 undef to i192 ; <i192> [#uses=2]
12 %2 = zext i64 %tmp121 to i192 ; <i192> [#uses=1]
13 %3 = shl i192 %2, 64 ; <i192> [#uses=2]
14 %4 = zext i64 %tmp122 to i192 ; <i192> [#uses=1]
15 %5 = shl i192 %4, 128 ; <i192> [#uses=1]
16 %6 = or i192 %3, %1 ; <i192> [#uses=1]
17 %7 = or i192 %6, %5 ; <i192> [#uses=2
[all...] |
| bx_fold.ll | 8 %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
9 %tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
11 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
15 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
16 %i.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
17 %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=1]
18 %tmp2 = add i32 %i.0, %tmp ; <i32> [#uses=1]
19 %Ptr_addr.0 = sub i32 %Ptr, %tmp2 ; <i32> [#uses=0]
20 %tmp12 = icmp eq i32 %i.0, %Ptr ; <i1> [#uses=1]
21 %tmp12.not = xor i1 %tmp12, true ; <i1> [#uses=1
[all...] |
| ifcvt7.ll | 14 %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
15 %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2]
16 %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
17 %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1]
18 %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1]
19 %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1]
20 %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1]
21 %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1]
22 %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1]
23 %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| select.ll | 4 @AConst = constant i32 123 ; <i32*> [#uses=1]
9 %a = add i32 %N, 1 ; <i32> [#uses=0]
10 %i = add i32 %N, 12345678 ; <i32> [#uses=0]
11 %b = add i16 4, 3 ; <i16> [#uses=0]
12 %c = fadd float %X, 0.000000e+00 ; <float> [#uses=0]
13 %d = fadd float %X, 0x400921CAC0000000 ; <float> [#uses=0]
14 %f = add i32 -1, 10 ; <i32> [#uses=0]
15 %g = add i16 20, -1 ; <i16> [#uses=0]
16 %j = add i16 -1, 30 ; <i16> [#uses=0]
17 %h = add i8 40, -1 ; <i8> [#uses=0
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| vec_perf_shuffle.ll | 4 %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
5 %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
6 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 undef, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
11 %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
12 %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
13 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 0, i32 undef, i32 5 > ; <<4 x float>> [#uses=1]
18 %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
19 %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
20 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 undef, i32 7, i32 3 > ; <<4 x float>> [#uses=1]
25 %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1
[all...] |
| or-addressing-mode.ll | 5 %tmp.2.i = ptrtoint i8* %P to i32 ; <i32> [#uses=2]
6 %tmp.4.i = and i32 %tmp.2.i, -65536 ; <i32> [#uses=1]
7 %tmp.10.i = lshr i32 %tmp.2.i, 5 ; <i32> [#uses=1]
8 %tmp.11.i = and i32 %tmp.10.i, 2040 ; <i32> [#uses=1]
9 %tmp.13.i = or i32 %tmp.11.i, %tmp.4.i ; <i32> [#uses=1]
10 %tmp.14.i = inttoptr i32 %tmp.13.i to i32* ; <i32*> [#uses=1]
11 %tmp.3 = load i32* %tmp.14.i ; <i32> [#uses=1]
16 %tmp.2 = shl i32 %P, 4 ; <i32> [#uses=1]
17 %tmp.3 = or i32 %tmp.2, 2 ; <i32> [#uses=1]
18 %tmp.4 = inttoptr i32 %tmp.3 to i32* ; <i32*> [#uses=1
[all...] |
| /external/llvm/test/ExecutionEngine/ |
| 2002-12-16-ArgTest.ll | 3 @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
16 call i32 (i8*, ...)* @printf( i8* getelementptr ([10 x i8]* @.LC0, i64 0, i64 0), i32 %argc ) ; <i32>:0 [#uses=0]
17 %cast224 = bitcast i8** %argv to i8* ; <i8*> [#uses=1]
18 %local = alloca i8* ; <i8**> [#uses=3]
20 %cond226 = icmp sle i32 %argc, 0 ; <i1> [#uses=1]
23 %cann-indvar = phi i32 [ 0, %bb0 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2]
24 %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2]
25 %cann-indvar-idxcast = sext i32 %cann-indvar to i64 ; <i64> [#uses=1]
26 %CT = bitcast i8** %local to i8*** ; <i8***> [#uses=1]
27 %reg115 = load i8*** %CT ; <i8**> [#uses=1
[all...] |
| /external/llvm/test/Transforms/ADCE/ |
| 2003-06-24-BasicFunctionality.ll | 5 %tmp.1 = load i32* %data.1 ; <i32> [#uses=2]
6 %tmp.41 = icmp sgt i32 %tmp.1, 0 ; <i1> [#uses=1]
10 %tmp.11 = getelementptr i32* %data.1, i64 1 ; <i32*> [#uses=1]
11 %tmp.22-idxcast = sext i32 %idx.1 to i64 ; <i64> [#uses=1]
12 %tmp.28 = getelementptr i32* %data.1, i64 %tmp.22-idxcast ; <i32*> [#uses=1]
16 %k.1 = phi i32 [ %k.0, %endif ], [ 0, %no_exit.preheader ] ; <i32> [#uses=3]
17 %i.0 = phi i32 [ %inc.1, %endif ], [ 0, %no_exit.preheader ] ; <i32> [#uses=1]
18 %tmp.12 = load i32* %tmp.11 ; <i32> [#uses=1]
19 %tmp.14 = sub i32 0, %tmp.12 ; <i32> [#uses=1]
20 %tmp.161 = icmp ne i32 %k.1, %tmp.14 ; <i1> [#uses=1
[all...] |
| /external/llvm/test/Transforms/GVN/ |
| calls-nonlocal.ll | 7 %tmp2 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
8 %tmp3 = icmp eq i32 %tmp2, 100 ; <i1> [#uses=1]
9 %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
10 %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
17 %tmp8 = add i32 %g, 42 ; <i32> [#uses=2]
18 %tmp10 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
19 %tmp11 = icmp eq i32 %tmp10, 100 ; <i1> [#uses=1]
20 %tmp1112 = zext i1 %tmp11 to i8 ; <i8> [#uses=1]
21 %toBool13 = icmp ne i8 %tmp1112, 0 ; <i1> [#uses=1]
28 %tmp18 = mul i32 %tmp8, 2 ; <i32> [#uses=1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| pr2645-1.ll | 11 %.0 = phi i32 [ 0, %3 ], [ %19, %6 ] ; <i32> [#uses=4]
12 %5 = icmp slt i32 %.0, %1 ; <i1> [#uses=1]
16 %7 = getelementptr i8* %2, i32 %.0 ; <i8*> [#uses=1]
17 %8 = bitcast i8* %7 to <4 x i16>* ; <<4 x i16>*> [#uses=1]
18 %9 = load <4 x i16>* %8, align 1 ; <<4 x i16>> [#uses=1]
19 %10 = bitcast <4 x i16> %9 to <1 x i64> ; <<1 x i64>> [#uses=1]
21 ; <<2 x i64>> [#uses=1]
22 %12 = bitcast <2 x i64> %11 to <4 x i32> ; <<4 x i32>> [#uses=1]
23 %13 = bitcast <4 x i32> %12 to <8 x i16> ; <<8 x i16>> [#uses=2]
24 %14 = shufflevector <8 x i16> %13, <8 x i16> %13, <8 x i32> < i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3 > ; <<8 x i16>> [#uses=1
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| share_code_in_preheader.ll | 6 %tmp.6 = mul i32 %Q, %L ; <i32> [#uses=1]
7 %N = bitcast i32 %N.s to i32 ; <i32> [#uses=1]
10 %indvar.ui = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=2]
11 %Sum.0.0 = phi i8 [ 0, %entry ], [ %tmp.21, %no_exit ] ; <i8> [#uses=1]
12 %indvar = bitcast i32 %indvar.ui to i32 ; <i32> [#uses=1]
13 %N_addr.0.0 = sub i32 %N.s, %indvar ; <i32> [#uses=1]
14 %tmp.8 = add i32 %N_addr.0.0, %tmp.6 ; <i32> [#uses=2]
15 %tmp.9 = getelementptr i8* %A, i32 %tmp.8 ; <i8*> [#uses=1]
16 %tmp.10 = load i8* %tmp.9 ; <i8> [#uses=1]
17 %tmp.17 = getelementptr i8* %B, i32 %tmp.8 ; <i8*> [#uses=1
[all...] |
| /frameworks/base/tests/CoreTests/android/ |
| AndroidManifest.xml | 19 <uses-permission android:name="android.permission.RECEIVE_SMS"/>
20 <uses-permission android:name="android.permission.INTERNET" />
21 <uses-permission android:name="android.permission.READ_CONTACTS" />
22 <uses-permission android:name="android.permission.WRITE_CONTACTS" />
23 <uses-permission android:name="android.permission.WAKE_LOCK" />
24 <uses-permission android:name="android.permission.CHANGE_CONFIGURATION" />
25 <uses-permission android:name="android.permission.WRITE_APN_SETTINGS" />
26 <uses-permission android:name="android.permission.BROADCAST_STICKY" />
27 <uses-permission android:name="android.permission.ACCESS_NETWORK_STATE" />
30 <uses-permission android:name="android.permission.ACCESS_FINE_LOCATION"/
[all...] |
| /external/llvm/test/Analysis/ScalarEvolution/ |
| 2008-12-08-FiniteSGE.ll | 8 %indvar = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=4]
9 %i.0.reg2mem.0 = sub i32 255, %indvar ; <i32> [#uses=2]
10 %0 = getelementptr i32* %alp, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
11 %1 = load i32* %0, align 4 ; <i32> [#uses=1]
12 %2 = getelementptr i32* %lam, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
14 %3 = sub i32 254, %indvar ; <i32> [#uses=1]
15 %4 = icmp slt i32 %3, 0 ; <i1> [#uses=1]
16 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
20 %tmp10 = mul i32 %indvar, %x ; <i32> [#uses=1]
21 %z.0.reg2mem.0 = add i32 %tmp10, %y ; <i32> [#uses=1
[all...] |
| sext-iv-1.ll | 15 %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
16 %0 = trunc i64 %i.0.reg2mem.0 to i7 ; <i8> [#uses=1]
17 %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
18 %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
19 %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
20 %4 = load double* %3, align 8 ; <double> [#uses=1]
21 %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
22 %6 = sext i7 %0 to i64 ; <i64> [#uses=1]
23 %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
25 %8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/Thumb/ |
| long.ll | 36 %tmp1 = add i64 %y, 1 ; <i64> [#uses=1]
42 %tmp = call i64 @f8( ) ; <i64> [#uses=0]
50 %tmp = sub i64 %a, %b ; <i64> [#uses=1]
56 %tmp = sext i32 %a to i64 ; <i64> [#uses=1]
57 %tmp1 = sext i32 %b to i64 ; <i64> [#uses=1]
58 %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
64 %tmp = zext i32 %a to i64 ; <i64> [#uses=1]
65 %tmp1 = zext i32 %b to i64 ; <i64> [#uses=1]
66 %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
72 %a = alloca i64, align 8 ; <i64*> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| 2010-06-19-ITBlockCrash.ll | 11 %0 = sext i8 0 to i32 ; <i32> [#uses=1]
18 %1 = tail call arm_apcscc i32 @__maskrune(i32 %0, i32 32768) nounwind ; <i32> [#uses=1]
19 %2 = icmp ne i32 %1, 0 ; <i1> [#uses=1]
20 %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
21 %.pre = load i8* undef, align 1 ; <i8> [#uses=1]
25 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]
26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]
27 %6 = icmp eq i32 %5, 0 ; <i1> [#uses=1]
28 %7 = sext i8 %4 to i32 ; <i32> [#uses=1]
29 %storemerge1 = select i1 %6, i32 %7, i32 undef ; <i32> [#uses=1
[all...] |
