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  /external/llvm/test/CodeGen/PowerPC/
delete-node.ll 12 %0 = load i16* null, align 2 ; <i16> [#uses=1]
13 %1 = ashr i16 %0, 4 ; <i16> [#uses=1]
14 %2 = sext i16 %1 to i32 ; <i32> [#uses=1]
15 %3 = getelementptr i8* null, i32 %2 ; <i8*> [#uses=1]
16 %4 = load i8* %3, align 1 ; <i8> [#uses=1]
17 %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
18 %6 = shl i32 %5, 24 ; <i32> [#uses=1]
19 %7 = or i32 0, %6 ; <i32> [#uses=1]
extsh.ll 4 %tmp.81 = shl i32 %X, 16 ; <i32> [#uses=1]
5 %tmp.82 = ashr i32 %tmp.81, 16 ; <i32> [#uses=1]
fnabs.ll 6 %Y = call double @fabs( double %X ) ; <double> [#uses=1]
7 %Z = fsub double -0.000000e+00, %Y ; <double> [#uses=1]
fp-int-fp.ll 4 %Y = fptosi double %X to i64 ; <i64> [#uses=1]
5 %Z = sitofp i64 %Y to double ; <double> [#uses=1]
10 %Y = fptosi double %X to i64 ; <i64> [#uses=1]
11 %Z = sitofp i64 %Y to float ; <float> [#uses=1]
16 %Y = fptosi float %X to i64 ; <i64> [#uses=1]
17 %Z = sitofp i64 %Y to double ; <double> [#uses=1]
22 %Y = fptosi float %X to i64 ; <i64> [#uses=1]
23 %Z = sitofp i64 %Y to float ; <float> [#uses=1]
hidden-vis.ll 3 @x = weak hidden global i32 0 ; <i32*> [#uses=1]
7 %0 = load i32* @x, align 4 ; <i32> [#uses=1]
ispositive.ll 6 icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
7 zext i1 %0 to i32 ; <i32>:1 [#uses=1]
lha.ll 4 %tmp.1 = load i16* %a ; <i16> [#uses=1]
5 %tmp.2 = sext i16 %tmp.1 to i32 ; <i32> [#uses=1]
mul-neg-power-2.ll 4 %tmp.1 = mul i32 %a, -2 ; <i32> [#uses=1]
5 %tmp.2 = add i32 %tmp.1, 63 ; <i32> [#uses=1]
ppcf128-3.ll 6 %tmp1112 = sitofp i16 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
7 %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
13 %tmp1112 = sitofp i8 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
14 %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
20 %tmp1112 = uitofp i16 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
21 %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
27 %tmp1112 = uitofp i8 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
28 %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
setcc_no_zext.ll 5 %tmp.1 = icmp ne i32* %a, null ; <i1> [#uses=1]
6 %inc.1 = zext i1 %tmp.1 to i32 ; <i32> [#uses=1]
  /external/llvm/test/CodeGen/SPARC/
2009-08-28-PIC.ll 3 @foo = global i32 0 ; <i32*> [#uses=1]
7 %0 = load i32* @foo, align 4 ; <i32> [#uses=1]
  /external/llvm/test/CodeGen/Thumb/
ispositive.ll 7 icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
8 zext i1 %0 to i32 ; <i32>:1 [#uses=1]
  /external/llvm/test/CodeGen/Thumb2/
ifcvt-neon.ll 4 @a = common global float 0.000000e+00 ; <float*> [#uses=2]
5 @b = common global float 0.000000e+00 ; <float*> [#uses=1]
9 %0 = icmp sgt i32 %c, 1 ; <i1> [#uses=1]
10 %1 = load float* @a, align 4 ; <float> [#uses=2]
11 %2 = load float* @b, align 4 ; <float> [#uses=2]
18 %3 = fadd float %1, %2 ; <float> [#uses=1]
22 %4 = fsub float %1, %2 ; <float> [#uses=1]
26 %storemerge = phi float [ %4, %bb1 ], [ %3, %bb ] ; <float> [#uses=2]
thumb2-uxtb.ll 10 %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1]
22 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
23 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
34 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
35 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
46 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
47 %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
58 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
59 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
70 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1
    [all...]
  /external/llvm/test/CodeGen/X86/
2004-02-22-Casts.ll 3 %V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
8 %V = uitofp i64 %X to double ; <double> [#uses=1]
2004-03-30-Select-Max.ll 4 %gt = icmp sgt i32 %A, %B ; <i1> [#uses=1]
5 %R = select i1 %gt, i32 %A, i32 %B ; <i32> [#uses=1]
2004-10-08-SelectSetCCFold.ll 4 %E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
5 %F = select i1 %C, i1 %D, i1 %E ; <i1> [#uses=1]
2006-05-11-InstrSched.ll 7 %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1]
11 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
12 %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1]
13 %tmp.10 = add nsw i32 %tmp., 1 ; <i32> [#uses=2]
14 %tmp31 = add nsw i32 %tmp.10, -1 ; <i32> [#uses=4]
15 %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1]
16 %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; <i8*> [#uses=1]
18 %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1]
19 %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
20 %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1
    [all...]
2006-05-25-CycleInDAG.ll 8 %tmp44.i = call double @foo( double 0.000000e+00, i32 32 ) ; <double> [#uses=1]
9 %tmp61.i = load i8* null ; <i8> [#uses=1]
10 %tmp61.i.upgrd.1 = zext i8 %tmp61.i to i32 ; <i32> [#uses=1]
11 %tmp58.i = or i32 0, %tmp61.i.upgrd.1 ; <i32> [#uses=1]
12 %tmp62.i = or i32 %tmp58.i, 0 ; <i32> [#uses=1]
13 %tmp62.i.upgrd.2 = sitofp i32 %tmp62.i to double ; <double> [#uses=1]
14 %tmp64.i = fadd double %tmp62.i.upgrd.2, %tmp44.i ; <double> [#uses=1]
15 %tmp68.i = call double @foo( double %tmp64.i, i32 0 ) ; <double> [#uses=0]
2006-11-27-SelectLegalize.ll 5 %a = trunc i32 %A to i1 ; <i1> [#uses=1]
6 %D = select i1 %a, i32 %B, i32 %C ; <i32> [#uses=1]
2007-08-10-SignExtSubreg.ll 3 @X = global i32 0 ; <i32*> [#uses=1]
8 %retval67 = trunc i32 %x to i8 ; <i8> [#uses=1]
2008-09-19-RegAllocBug.ll 4 @g_3 = external global i32 ; <i32*> [#uses=1]
8 %0 = load i32* @g_3, align 4 ; <i32> [#uses=2]
9 %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
10 %2 = sub i8 1, %1 ; <i8> [#uses=1]
11 %3 = sext i8 %2 to i32 ; <i32> [#uses=1]
12 %.0 = ashr i32 %3, select (i1 icmp ne (i8 zext (i1 icmp ugt (i32 ptrtoint (i32 ()* @func_4 to i32), i32 3) to i8), i8 0), i32 0, i32 ptrtoint (i32 ()* @func_4 to i32)) ; <i32> [#uses=1]
13 %4 = urem i32 %0, %.0 ; <i32> [#uses=1]
14 %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1]
2008-10-11-CallCrash.ll 5 @g_385 = external global i32 ; <i32*> [#uses=1]
9 %0 = tail call i32 (...)* @lshift_s_u(i64 %p_46, i64 0) nounwind ; <i32> [#uses=0]
10 %1 = load i32* @g_385, align 4 ; <i32> [#uses=1]
11 %2 = shl i32 %1, 1 ; <i32> [#uses=1]
12 %3 = and i32 %2, 32 ; <i32> [#uses=1]
13 %4 = tail call i32 (...)* @func_87(i32 undef, i32 %p_48, i32 1) nounwind ; <i32> [#uses=1]
14 %5 = add i32 %3, %4 ; <i32> [#uses=1]
15 %6 = tail call i32 (...)* @div_rhs(i32 %5) nounwind ; <i32> [#uses=0]
2008-10-29-ExpandVAARG.ll 5 %ap.addr = alloca i8* ; <i8**> [#uses=36]
8 %0 = va_arg i8** %ap.addr, i64 ; <i64> [#uses=1]
2009-02-12-SpillerBug.ll 6 %0 = fmul x86_fp80 %b, %d ; <x86_fp80> [#uses=1]
7 %1 = fsub x86_fp80 0xK00000000000000000000, %0 ; <x86_fp80> [#uses=1]
8 %2 = fadd x86_fp80 0xK00000000000000000000, 0xK00000000000000000000 ; <x86_fp80> [#uses=1]
9 %3 = fcmp uno x86_fp80 %1, 0xK00000000000000000000 ; <i1> [#uses=1]
10 %4 = fcmp uno x86_fp80 %2, 0xK00000000000000000000 ; <i1> [#uses=1]
11 %or.cond = and i1 %3, %4 ; <i1> [#uses=1]
15 %5 = fcmp uno x86_fp80 %a, 0xK00000000000000000000 ; <i1> [#uses=1]
19 %6 = tail call x86_fp80 @copysignl(x86_fp80 0xK00000000000000000000, x86_fp80 %a) nounwind readnone ; <x86_fp80> [#uses=0]

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