| /external/llvm/test/CodeGen/ARM/ |
| 2009-08-02-RegScavengerAssert-Neon.ll | 9 %v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
10 %f_addr = alloca i32 ; <i32*> [#uses=2]
11 %retval = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
12 %0 = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
13 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
16 %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1]
17 %2 = load i32* %f_addr, align 4 ; <i32> [#uses=1]
18 %3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> [#uses=1]
19 %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>> [#uses=1]
20 %5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1
[all...] |
| 2009-09-20-LiveIntervalsBug.ll | 13 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
14 %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1]
15 %2 = insertelement <4 x float> %1, float undef, i32 2 ; <<4 x float>> [#uses=1]
16 %3 = insertelement <4 x float> %2, float undef, i32 3 ; <<4 x float>> [#uses=1]
17 %4 = fmul <4 x float> undef, %3 ; <<4 x float>> [#uses=1]
18 %5 = extractelement <4 x float> %4, i32 3 ; <float> [#uses=1]
27 %1 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
28 %2 = insertelement <4 x float> %1, float undef, i32 1 ; <<4 x float>> [#uses=1]
29 %3 = insertelement <4 x float> %2, float undef, i32 2 ; <<4 x float>> [#uses=1]
30 %4 = insertelement <4 x float> %3, float undef, i32 3 ; <<4 x float>> [#uses=1
[all...] |
| ldm.ll | 4 @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
11 %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
12 %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
13 %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
22 %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
23 %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
24 %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
25 %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
37 %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
38 %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| 2006-10-29-Crash.ll | 5 %tmp7 = and i32 %dy, 1 ; <i32> [#uses=1]
6 %tmp27 = icmp eq i32 %tmp7, 0 ; <i1> [#uses=1]
13 %bothcond1 = or i1 %tmp27, false ; <i1> [#uses=1]
|
| select-cc.ll | 5 %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
6 %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
7 %a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
|
| /external/llvm/test/CodeGen/MSP430/ |
| indirectbr.ll | 3 @nextaddr = global i8* null ; <i8**> [#uses=2]
4 @C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
8 %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
9 %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
13 %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
17 %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i16 0, i16 %i ; <i8**> [#uses=1]
18 %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
25 %res.0 = phi i16 [ 385, %L5 ], [ 35, %bb2 ] ; <i16> [#uses=1]
29 %res.1 = phi i16 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i16> [#uses=1]
33 %res.2 = phi i16 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i16> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| 2005-08-12-rlwimi-crash.ll | 7 %tmp.85.i = and i32 %j.0.0.i, 7 ; <i32> [#uses=1]
8 %tmp.161278.i = bitcast i32 %tmp.85.i to i32 ; <i32> [#uses=1]
9 %tmp.5.i77.i = lshr i32 %tmp.161278.i, 3 ; <i32> [#uses=1]
|
| 2006-10-13-Miscompile.ll | 5 %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]
6 %tmp = icmp sgt i64 %tmp1, 2 ; <i1> [#uses=1]
9 %tmp.upgrd.1 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
|
| 2007-03-24-cntlzd.ll | 5 %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19, i1 true ) ; <i64> [#uses=1]
7 %tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1]
8 %tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1]
|
| 2007-10-16-InlineAsmFrameOffset.ll | 9 %data = alloca i32 ; <i32*> [#uses=1]
10 %compressedPage = alloca %struct._StorePageMax ; <%struct._StorePageMax*> [#uses=0]
11 %tmp107 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,*m"( i8* null, i32 0, i32* %data ) ; <i32> [#uses=0]
|
| and_add.ll | 8 %B = mul i32 %A, 8 ; <i32> [#uses=1]
10 %C = add i32 %B, 7 ; <i32> [#uses=1]
12 %D = and i32 %C, -8 ; <i32> [#uses=1]
|
| select-cc.ll | 5 %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
6 %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
7 %a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
|
| /external/llvm/test/CodeGen/SPARC/ |
| 2006-01-22-BitConvertLegalize.ll | 4 %tmp.33.i = fdiv float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1]
5 %tmp.37.i = fmul float 0.000000e+00, %tmp.33.i ; <float> [#uses=1]
6 %tmp.42.i = fadd float %tmp.37.i, 0.000000e+00 ; <float> [#uses=1]
|
| /external/llvm/test/CodeGen/Thumb/ |
| vargs.ll | 5 @str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
9 %va = alloca i8*, align 4 ; <i8**> [#uses=4]
10 %va.upgrd.1 = bitcast i8** %va to i8* ; <i8*> [#uses=1]
15 %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; <i32> [#uses=2]
16 %tmp = load volatile i8** %va ; <i8*> [#uses=2]
17 %tmp2 = getelementptr i8* %tmp, i32 4 ; <i8*> [#uses=1]
19 %tmp5 = add i32 %a_addr.0, -1 ; <i32> [#uses=1]
20 %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; <i1> [#uses=1]
24 %tmp3 = bitcast i8* %tmp to i32* ; <i32*> [#uses=1]
25 %tmp.upgrd.3 = load i32* %tmp3 ; <i32> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-08-08-ScavengerAssert.ll | 4 @g_d = external global double ; <double*> [#uses=1]
11 %0 = call arm_aapcs_vfpcc float @bar() ; <float> [#uses=1]
12 %1 = fpext float %0 to double ; <double> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| 2008-06-16-SubregsBug.ll | 4 %tmp180 = load i16* %tmp179, align 2 ; <i16> [#uses=2]
5 %tmp184 = and i16 %tmp180, -1024 ; <i16> [#uses=1]
6 %tmp186 = icmp eq i16 %tmp184, -32768 ; <i1> [#uses=1]
|
| 2008-10-06-MMXISelBug.ll | 4 @tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2]
8 %0 = load <2 x i32>* @tmp_V2i, align 8 ; <<2 x i32>> [#uses=1]
9 %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer ; <<2 x i32>> [#uses=1]
|
| 2008-10-24-FlippedCompare.ll | 5 %0 = fcmp ogt float %wt, 0.000000e+00 ; <i1> [#uses=1]
6 %1 = tail call i32 @g(i32 44) ; <i32> [#uses=3]
7 %2 = inttoptr i32 %1 to i8* ; <i8*> [#uses=2]
|
| 2009-01-16-SchedulerBug.ll | 13 %param_x = load %XXV** null ; <%XXV*> [#uses=1]
14 %unique_1.i = ptrtoint %XXV* %param_x to i1 ; <i1> [#uses=1]
18 %param_y = load %XXV** null ; <%XXV*> [#uses=1]
19 %unique_1.i58 = ptrtoint %XXV* %param_y to i1 ; <i1> [#uses=1]
26 %has_exn = icmp eq %XXV* null, null ; <i1> [#uses=1]
30 %0 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 0, i32 0) ; <{ i32, i1 }> [#uses=2]
31 %intAdd = extractvalue { i32, i1 } %0, 0 ; <i32> [#uses=2]
32 %intAddOverflow = extractvalue { i32, i1 } %0, 1 ; <i1> [#uses=1]
33 %toint56 = ashr i32 %intAdd, 1 ; <i32> [#uses=1]
34 %toFP57 = sitofp i32 %toint56 to double ; <double> [#uses=1
[all...] |
| 2009-06-07-ExpandMMXBitcast.ll | 5 %0 = insertelement <2 x i32> undef, i32 %a, i32 0 ; <<2 x i32>> [#uses=1]
6 %1 = insertelement <2 x i32> %0, i32 %b, i32 1 ; <<2 x i32>> [#uses=1]
7 %conv = bitcast <2 x i32> %1 to i64 ; <i64> [#uses=1]
|
| fast-isel-tailcall.ll | 9 %t1 = load i32* inttoptr (i32 139708680 to i32*) ; <i32> [#uses=1]
10 %t2 = bitcast i8* %t0 to i32 (i32)* ; <i32 (i32)*> [#uses=1]
11 %t3 = call fastcc i32 %t2(i32 %t1) ; <i32> [#uses=1]
|
| fold-pcmpeqd-2.ll | 13 ; No pcmpeqd instructions, everybody uses the constant pool.
23 %tmp3.i = load i32* null ; <i32> [#uses=1]
24 %cmp = icmp slt i32 0, %tmp3.i ; <i1> [#uses=1]
31 %tmp3.i536 = load i32* null ; <i32> [#uses=1]
32 %cmp12 = icmp slt i32 0, %tmp3.i536 ; <i1> [#uses=1]
36 %bitcast204.i104 = bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>> [#uses=1]
37 %tmp78 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> < float 1.280000e+02, float 1.280000e+02, float 1.280000e+02, float 1.280000e+02 >, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=2]
38 %tmp79 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp78) nounwind ; <<4 x i32>> [#uses=1]
39 %tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp79) nounwind ; <<4 x float>> [#uses=1]
40 %sub140.i = fsub <4 x float> %tmp78, %tmp80 ; <<4 x float>> [#uses=2
[all...] |
| inline-asm-2addr.ll | 5 %asmtmp = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %a) nounwind ; <i64> [#uses=1]
6 %asmtmp1 = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %b) nounwind ; <i64> [#uses=1]
7 %0 = add i64 %asmtmp1, %asmtmp ; <i64> [#uses=1]
|
| lea-2.ll | 7 %tmp1 = shl i32 %A, 2 ; <i32> [#uses=1]
8 %tmp3 = add i32 %B, -5 ; <i32> [#uses=1]
9 %tmp4 = add i32 %tmp3, %tmp1 ; <i32> [#uses=1]
|
| limited-prec.ll | 10 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
11 %0 = call float @llvm.exp.f32(float %x) ; <float> [#uses=1]
19 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
20 %0 = call float @llvm.exp2.f32(float %x) ; <float> [#uses=1]
28 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
29 %0 = call float @llvm.pow.f32(float 1.000000e+01, float %x) ; <float> [#uses=1]
37 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
38 %0 = call float @llvm.log.f32(float %x) ; <float> [#uses=1]
46 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
47 %0 = call float @llvm.log2.f32(float %x) ; <float> [#uses=1
[all...] |
