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  /external/openssl/crypto/bn/asm/
x86_64-mont5.pl 109 movq `0*$STRIDE/4-96`($bp),%xmm0
111 pand %xmm4,%xmm0
116 por %xmm1,%xmm0
118 por %xmm2,%xmm0
120 por %xmm3,%xmm0
122 movq %xmm0,$m0 # m0=bp[0]
130 movq `0*$STRIDE/4-96`($bp),%xmm0
132 pand %xmm4,%xmm0
143 por %xmm1,%xmm0
149 por %xmm2,%xmm0
    [all...]
  /external/v8/test/cctest/
test-disasm-ia32.cc 375 __ addsd(xmm1, xmm0);
376 __ mulsd(xmm1, xmm0);
377 __ subsd(xmm1, xmm0);
378 __ divsd(xmm1, xmm0);
381 __ ucomisd(xmm0, xmm1);
384 __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));
385 __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0); local
386 __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000));
387 __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0); local
418 __ andpd(xmm0, xmm1)
    [all...]
  /external/libvpx/vp8/encoder/x86/
sad_sse2.asm 41 movq xmm0, QWORD PTR [rsi]
51 punpcklbw xmm0, xmm2
54 psadbw xmm0, xmm1
66 paddw xmm7, xmm0
72 movq xmm0, xmm7
75 paddw xmm0, xmm7
76 movq rax, xmm0
  /dalvik/vm/mterp/x86-atom/
OP_CMPL_FLOAT.S 42 movs$sod (rFP, %ecx, 4), %xmm0 # %xmm0<- vBB
43 comis$sod (rFP, %edx, 4), %xmm0 # do comparison
OP_SGET_WIDE.S 42 movq offStaticField_value(%ecx), %xmm0 # %xmm0<- field value
43 movq %xmm0, (rFP, rINST, 4) # vAA<- field value
OP_SPUT_WIDE.S 42 movq (rFP, rINST, 4), %xmm0 # %xmm0<- vAA
43 movq %xmm0, offStaticField_value(%ecx) # field value<- field value
binopDivRemLong.S 42 movq (rFP, %edx, 4), %xmm0 # %xmm0<- vBB,vBB+1
46 movq %xmm0, -16(%esp) # push arg vBB,vBB+1
binopDivRemLong2Addr.S 43 movq (rFP, rINST, 4), %xmm0 # %xmm0<- vA,vA+1
47 movq %xmm0, -20(%esp) # push arg vA, vA+1
OP_ADD_DOUBLE.S 20 %include "x86-atom/binopWide.S" {"instr":"addsd %xmm1, %xmm0"}
OP_ADD_DOUBLE_2ADDR.S 20 %include "x86-atom/binopWide2addr.S" {"instr":"addsd %xmm1, %xmm0"}
OP_ADD_FLOAT.S 20 %include "x86-atom/binopF.S" {"instr":"addss %xmm1, %xmm0"}
OP_ADD_FLOAT_2ADDR.S 20 %include "x86-atom/binopF2addr.S" {"instr":"addss %xmm1, %xmm0"}
OP_ADD_LONG.S 20 %include "x86-atom/binopWide.S" {"instr":"paddq %xmm1, %xmm0"}
OP_ADD_LONG_2ADDR.S 20 %include "x86-atom/binopWide2addr.S" {"instr":"paddq %xmm1, %xmm0"}
OP_AND_LONG.S 20 %include "x86-atom/binopWide.S" {"instr":"pand %xmm1, %xmm0"}
OP_AND_LONG_2ADDR.S 20 %include "x86-atom/binopWide2addr.S" {"instr":"pand %xmm1, %xmm0"}
OP_IGET_WIDE.S 72 movq (%ecx, %edx), %xmm0 # %xmm0<- object field
73 movq %xmm0, (rFP, rINST, 4) # vA<- %xmm0; object field
OP_IPUT_WIDE.S 72 movq (rFP, rINST, 4), %xmm0 # %xmm0<- vA
73 movq %xmm0, (%ecx, %edx) # object field<- %xmm0; vA
OP_MUL_DOUBLE.S 20 %include "x86-atom/binopWide.S" {"instr":"mulsd %xmm1, %xmm0"}
  /external/compiler-rt/lib/x86_64/
floatundidf.S 34 movd %edi, %xmm0 // low 32 bits of a
37 orpd REL_ADDR(twop52), %xmm0 // 0x1p52 + a_lo (no rounding occurs)
40 addsd %xmm1, %xmm0 // a_hi + a_lo (round happens here)
  /external/llvm/test/CodeGen/X86/
fold-xmm-zero.ll 12 %0 = tail call %0 asm sideeffect "foo", "={xmm0},={xmm1},={xmm2},={xmm3},={xmm4},={xmm5},={xmm6},={xmm7},0,1,2,3,4,5,6,7,~{dirflag},~{fpsr},~{flags}"(float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00) nounwind
22 %1 = tail call %0 asm sideeffect "bar", "={xmm0},={xmm1},={xmm2},={xmm3},={xmm4},={xmm5},={xmm6},={xmm7},0,1,2,3,4,5,6,7,~{dirflag},~{fpsr},~{flags}"(float %div, float %asmresult8, float %asmresult9, float %asmresult10, float %asmresult11, float %asmresult12, float %asmresult13, float %asmresult14) nounwind
32 %2 = tail call %0 asm sideeffect "baz", "={xmm0},={xmm1},={xmm2},={xmm3},={xmm4},={xmm5},={xmm6},={xmm7},0,1,2,3,4,5,6,7,~{dirflag},~{fpsr},~{flags}"(float %div33, float %asmresult25, float %asmresult26, float %asmresult27, float %asmresult28, float %asmresult29, float %asmresult30, float %asmresult31) nounwind
  /external/llvm/test/TableGen/
Slice.td 41 def XMM0: Register<"xmm0">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
TargetInstrSpec.td 42 def XMM0: Register<"xmm0">;
60 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
cast.td 41 def XMM0: Register<"xmm0">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
  /frameworks/compile/libbcc/runtime/lib/x86_64/
floatundidf.S 34 movd %edi, %xmm0 // low 32 bits of a
37 orpd REL_ADDR(twop52), %xmm0 // 0x1p52 + a_lo (no rounding occurs)
40 addsd %xmm1, %xmm0 // a_hi + a_lo (round happens here)

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