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  /dalvik/vm/compiler/codegen/
CodegenFactory.cpp 35 static TGT_LIR *loadWordDisp(CompilationUnit *cUnit, int rBase,
38 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord,
42 static TGT_LIR *storeWordDisp(CompilationUnit *cUnit, int rBase,
45 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord);
53 static void loadValueDirect(CompilationUnit *cUnit, RegLocation rlSrc,
56 rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc);
58 genRegCopy(cUnit, reg1, rlSrc.lowReg);
60 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), reg1);
63 loadWordDisp(cUnit, rFP, dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2
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Ralloc.h 40 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg)
43 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
47 static inline void dvmCompilerResetNullCheck(CompilationUnit *cUnit)
49 dvmClearAllBits(cUnit->regPool->nullCheckedRegs);
55 * dataflow analysis and refer to slot numbers in the cUnit->regLocation
57 * entries in the cUnit->reglocation[] array. Therefore, when location
67 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg)
79 extern RegLocation dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc,
82 extern void dvmCompilerClobber(CompilationUnit *cUnit, int reg);
84 extern RegLocation dvmCompilerUpdateLoc(CompilationUnit *cUnit,
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RallocUtil.cpp 34 * dataflow analysis and refer to slot numbers in the cUnit->regLocation
36 * entries in the cUnit->reglocation[] array. Therefore, when location
46 extern void dvmCompilerResetRegPool(CompilationUnit *cUnit)
49 for (i=0; i < cUnit->regPool->numCoreTemps; i++) {
50 cUnit->regPool->coreTemps[i].inUse = false;
52 for (i=0; i < cUnit->regPool->numFPTemps; i++) {
53 cUnit->regPool->FPTemps[i].inUse = false;
83 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg)
85 int numTemps = cUnit->regPool->numCoreTemps;
86 RegisterInfo *p = cUnit->regPool->coreTemps
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CompilerCodegen.h 29 void dvmCompilerMIR2LIR(CompilationUnit *cUnit);
32 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit);
35 void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info);
41 void dvmJitInstallClassObjectPointers(CompilationUnit *cUnit,
48 void dvmCompilerCodegenDump(CompilationUnit *cUnit);
54 void dvmCompilerLocalRegAlloc(CompilationUnit *cUnit);
57 void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit);
72 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind);
  /dalvik/vm/compiler/codegen/arm/armv7-a-neon/
MethodCodegenDriver.cpp 38 static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir,
56 dvmCompilerFlushAllRegs(cUnit);
59 opRegRegImm(cUnit, kOpAdd, oldStackSave, r5FP,
60 cUnit->method->registersSize * 4);
62 opRegRegImm(cUnit, kOpAdd, oldFP, oldStackSave, sizeof(StackSaveArea));
64 opRegRegImm(cUnit, kOpSub, newStackSave, r5FP, sizeof(StackSaveArea));
66 loadWordDisp(cUnit, r13sp, 0, savedPC);
67 loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset));
68 loadConstant(cUnit, method, (int) cUnit->method)
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  /dalvik/vm/compiler/codegen/arm/FP/
ThumbPortableFP.cpp 18 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
22 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
26 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
28 static bool handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir);
30 static bool genConversion(CompilationUnit *cUnit, MIR *mir)
32 return genConversionPortable(cUnit, mir);
35 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
42 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
46 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2)
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Thumb2VFP.cpp 17 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1,
54 rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
55 rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
56 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
57 newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg,
59 storeValue(cUnit, rlDest, rlResult);
63 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
97 rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg)
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ThumbVFP.cpp 27 static void loadValueAddressDirect(CompilationUnit *cUnit, RegLocation rlSrc,
30 rlSrc = rlSrc.wide ? dvmCompilerUpdateLocWide(cUnit, rlSrc) :
31 dvmCompilerUpdateLoc(cUnit, rlSrc);
34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg);
36 dvmCompilerFlushReg(cUnit, rlSrc.lowReg);
39 dvmCompilerClobber(cUnit, rDest);
40 dvmCompilerLockTemp(cUnit, rDest);
41 opRegRegImm(cUnit, kOpAdd, rDest, r5FP,
42 dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2);
45 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir
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  /dalvik/vm/compiler/codegen/arm/Thumb2/
Gen.cpp 47 static int genTraceProfileEntry(CompilationUnit *cUnit)
51 newLIR1(cUnit, kArm16BitData, addr & 0xffff);
52 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff);
53 cUnit->chainCellOffsetLIR =
54 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG);
55 cUnit->headerSize = 6;
59 newLIR2(cUnit, kThumb2LdrPcReln12, r0, 8);
60 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0);
61 newLIR2(cUnit, kThumbAddRI8, r1, 1);
62 newLIR3(cUnit, kThumbStrRRI5, r1, r0, 0)
    [all...]
Factory.cpp 51 static ArmLIR *loadFPConstantValue(CompilationUnit *cUnit, int rDest,
57 return newLIR2(cUnit, kThumb2Vmovs_IMM8, rDest, encodedImm);
59 ArmLIR *dataTarget = scanLiteralPool(cUnit->literalList, value, 0);
61 dataTarget = addWordData(cUnit, &cUnit->literalList, value);
71 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
136 static ArmLIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest,
143 return loadFPConstantValue(cUnit, rDest, value);
148 return newLIR2(cUnit, kThumbMovImm, rDest, value);
153 res = newLIR2(cUnit, kThumb2MovImmShift, rDest, modImm)
    [all...]
Ralloc.cpp 32 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit,
44 lowReg = dvmCompilerAllocTempDouble(cUnit);
47 lowReg = dvmCompilerAllocTemp(cUnit);
48 highReg = dvmCompilerAllocTemp(cUnit);
54 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint,
61 return dvmCompilerAllocTempFloat(cUnit);
62 return dvmCompilerAllocTemp(cUnit);
  /dalvik/vm/compiler/codegen/arm/Thumb/
Gen.cpp 50 static int genTraceProfileEntry(CompilationUnit *cUnit)
54 newLIR1(cUnit, kArm16BitData, addr & 0xffff);
55 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff);
56 cUnit->chainCellOffsetLIR =
57 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG);
58 cUnit->headerSize = 6;
62 newLIR2(cUnit, kThumbMovRR_H2L, r0, r15pc);
63 newLIR2(cUnit, kThumbSubRI8, r0, 10);
64 newLIR3(cUnit, kThumbLdrRRI5, r0, r0, 0);
65 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0)
    [all...]
Factory.cpp 27 static void storePair(CompilationUnit *cUnit, int base, int lowReg,
29 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg);
30 static ArmLIR *loadWordDisp(CompilationUnit *cUnit, int rBase, int displacement,
32 static ArmLIR *storeWordDisp(CompilationUnit *cUnit, int rBase,
34 static ArmLIR *genRegRegCheck(CompilationUnit *cUnit,
49 static ArmLIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest,
53 int tDest = LOWREG(rDest) ? rDest : dvmCompilerAllocTemp(cUnit);
56 res = newLIR2(cUnit, kThumbMovImm, tDest, value);
58 opRegReg(cUnit, kOpMov, rDest, tDest);
59 dvmCompilerFreeTemp(cUnit, tDest)
    [all...]
Ralloc.cpp 29 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint,
35 lowReg = dvmCompilerAllocTemp(cUnit);
36 highReg = dvmCompilerAllocTemp(cUnit);
41 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass)
43 return dvmCompilerAllocTemp(cUnit);
  /dalvik/vm/compiler/codegen/arm/
CodegenDriver.cpp 30 static void markCard(CompilationUnit *cUnit, int valReg, int tgtAddrReg)
32 int regCardBase = dvmCompilerAllocTemp(cUnit);
33 int regCardNo = dvmCompilerAllocTemp(cUnit);
34 ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondEq, valReg, 0);
35 loadWordDisp(cUnit, r6SELF, offsetof(Thread, cardTable),
37 opRegRegImm(cUnit, kOpLsr, regCardNo, tgtAddrReg, GC_CARD_SHIFT);
38 storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0,
40 ArmLIR *target = newLIR0(cUnit, kArmPseudoTargetLabel);
43 dvmCompilerFreeTemp(cUnit, regCardBase);
44 dvmCompilerFreeTemp(cUnit, regCardNo)
    [all...]
ArmRallocUtil.cpp 52 extern void dvmCompilerClobberCallRegs(CompilationUnit *cUnit)
54 dvmCompilerClobber(cUnit, r0);
55 dvmCompilerClobber(cUnit, r1);
56 dvmCompilerClobber(cUnit, r2);
57 dvmCompilerClobber(cUnit, r3);
58 dvmCompilerClobber(cUnit, r9); // Need to do this?, be conservative
59 dvmCompilerClobber(cUnit, r11);
60 dvmCompilerClobber(cUnit, r12);
61 dvmCompilerClobber(cUnit, r14lr);
65 extern void dvmCompilerClobberHandlerRegs(CompilationUnit *cUnit)
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ArchFactory.cpp 29 static TGT_LIR *genRegImmCheck(CompilationUnit *cUnit,
34 TGT_LIR *branch = genCmpImmBranch(cUnit, cond, reg, checkValue);
35 if (cUnit->jitMode == kJitMethod) {
36 BasicBlock *bb = cUnit->curBlock;
38 ArmLIR *exceptionLabel = (ArmLIR *) cUnit->blockLabelList;
48 return genCheckCommon(cUnit, dOffset, branch, pcrLabel);
57 static TGT_LIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg,
61 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
64 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
65 return genRegImmCheck(cUnit, kArmCondEq, mReg, 0, dOffset, pcrLabel)
    [all...]
Codegen.h 32 static ArmLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
34 static ArmLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
38 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
42 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
46 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
49 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir);
52 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir);
64 extern ArmLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest,
GlobalOptimizations.cpp 25 static void applyRedundantBranchElimination(CompilationUnit *cUnit)
29 for (thisLIR = (ArmLIR *) cUnit->firstLIRInsn;
30 thisLIR != (ArmLIR *) cUnit->lastLIRInsn;
55 (nextLIR = (ArmLIR *) cUnit->lastLIRInsn))
62 void dvmCompilerApplyGlobalOptimizations(CompilationUnit *cUnit)
64 applyRedundantBranchElimination(cUnit);
  /dalvik/vm/compiler/codegen/x86/
CodegenDriver.cpp 27 extern X86LIR *loadConstant(CompilationUnit *cUnit, int rDest, int value);
28 extern X86LIR *loadWordDisp(CompilationUnit *cUnit, int rBase,
30 extern void dvmCompilerFlushAllRegs(CompilationUnit *cUnit);
31 extern void storeWordDisp(CompilationUnit *cUnit, int rBase,
33 extern X86LIR *opReg(CompilationUnit *cUnit, OpKind op, int rDestSrc);
43 static void genPuntToInterp(CompilationUnit *cUnit, unsigned int offset)
45 dvmCompilerFlushAllRegs(cUnit);
46 loadConstant(cUnit, rPC, (int)(cUnit->method->insns + offset));
47 loadWordDisp(cUnit, rEBP, 0, rECX); // Get glu
    [all...]
  /dalvik/vm/compiler/
SSATransformation.cpp 23 static void recordDFSPreOrder(CompilationUnit *cUnit, BasicBlock *block)
30 dvmInsertGrowableList(&cUnit->dfsOrder, block->id);
32 if (block->fallThrough) recordDFSPreOrder(cUnit, block->fallThrough);
33 if (block->taken) recordDFSPreOrder(cUnit, block->taken);
43 recordDFSPreOrder(cUnit, succBB);
50 static void computeDFSOrder(CompilationUnit *cUnit)
53 if (cUnit->dfsOrder.elemList == NULL) {
54 dvmInitGrowableList(&cUnit->dfsOrder, cUnit->numBlocks);
57 cUnit->dfsOrder.numUsed = 0
    [all...]
Ralloc.cpp 27 static void inferTypes(CompilationUnit *cUnit, BasicBlock *bb)
39 cUnit->regLocation[ssaRep->uses[i]].fp = true;
43 cUnit->regLocation[ssaRep->defs[i]].fp = true;
57 void dvmCompilerLocalRegAlloc(CompilationUnit *cUnit)
63 loc = (RegLocation*)dvmCompilerNew(cUnit->numSSARegs * sizeof(*loc), true);
64 for (i=0; i< cUnit->numSSARegs; i++) {
68 cUnit->regLocation = loc;
72 dvmGrowableListIteratorInit(&cUnit->blockList, &iterator);
77 inferTypes(cUnit, bb);
81 for (i=0; i < cUnit->numSSARegs; i++)
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Loop.cpp 26 static void dumpConstants(CompilationUnit *cUnit)
29 ALOGE("LOOP starting offset: %x", cUnit->entryBlock->startOffset);
30 for (i = 0; i < cUnit->numSSARegs; i++) {
31 if (dvmIsBitSet(cUnit->isConstantV, i)) {
32 int subNReg = dvmConvertSSARegToDalvik(cUnit, i);
35 cUnit->constantValues[i]);
40 static void dumpIVList(CompilationUnit *cUnit)
43 GrowableList *ivList = cUnit->loopAnalysis->ivList;
48 int iv = dvmConvertSSARegToDalvik(cUnit, ivInfo->ssaReg);
57 int biv = dvmConvertSSARegToDalvik(cUnit, ivInfo->basicSSAReg)
    [all...]
Frontend.cpp 512 static BasicBlock *splitBlock(CompilationUnit *cUnit,
527 cUnit->numBlocks++);
528 dvmInsertGrowableList(&cUnit->blockList, (intptr_t) bottomBlock);
596 static BasicBlock *findBlock(CompilationUnit *cUnit,
601 GrowableList *blockList = &cUnit->blockList;
613 BasicBlock *newBB = splitBlock(cUnit, codeOffset, bb,
620 bb = dvmCompilerNewBB(kDalvikByteCode, cUnit->numBlocks++);
621 dvmInsertGrowableList(&cUnit->blockList, (intptr_t) bb);
629 void dvmDumpCFG(CompilationUnit *cUnit, const char *dirPrefix)
631 const Method *method = cUnit->method
    [all...]
Dataflow.cpp 811 int dvmConvertSSARegToDalvik(const CompilationUnit *cUnit, int ssaReg)
813 return GET_ELEM_N(cUnit->ssaToDalvikMap, int, ssaReg);
909 char *getSSAName(const CompilationUnit *cUnit, int ssaReg, char *name)
911 int ssa2DalvikValue = dvmConvertSSARegToDalvik(cUnit, ssaReg);
921 char *dvmCompilerFullDisassembler(const CompilationUnit *cUnit,
937 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
938 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
942 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
962 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
967 getSSAName(cUnit, mir->ssaRep->uses[0], operand0)
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