Lines Matching refs:getSUnit
135 SUnit *PredSU = PredEdge->getSUnit();
167 LiveRegDefs[I->getReg()] = I->getSUnit();
191 if (LiveRegCycles[I->getReg()] == I->getSUnit()->getHeight()) {
284 else if (I->getSUnit()->getNode() &&
285 I->getSUnit()->getNode()->isOperandOf(LoadNode))
298 if (ChainPred.getSUnit()) {
317 SUnit *SuccDep = D.getSUnit();
325 SUnit *SuccDep = D.getSUnit();
362 SUnit *SuccSU = I->getSUnit();
399 SUnit *SuccSU = I->getSUnit();
474 CheckForLiveRegDef(I->getSUnit(), I->getReg(), LiveRegDefs,
