Lines Matching defs:OpInfo
5752 /// OpInfo describes the operand.
5757 SDISelAsmOperandInfo &OpInfo) {
5766 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5767 OpInfo.ConstraintVT);
5770 if (OpInfo.ConstraintVT != MVT::Other) {
5774 if (OpInfo.Type == InlineAsm::isInput &&
5775 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
5780 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
5781 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5782 RegVT, OpInfo.CallOperand);
5783 OpInfo.ConstraintVT = RegVT;
5784 } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
5790 OpInfo.ConstraintVT.getSizeInBits());
5791 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5792 RegVT, OpInfo.CallOperand);
5793 OpInfo.ConstraintVT = RegVT;
5797 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT);
5801 EVT ValueVT = OpInfo.ConstraintVT;
5807 if (OpInfo.ConstraintVT == MVT::Other)
5832 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5840 if (OpInfo.ConstraintVT == MVT::Other)
5848 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5872 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
5877 switch (OpInfo.Type) {
5880 if (OpInfo.isIndirect) {
5881 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5897 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5906 if (OpInfo.CallOperandVal) {
5907 if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
5908 OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
5910 OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
5913 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), TLI, TD);
5916 OpInfo.ConstraintVT = OpVT;
5919 if (OpInfo.isIndirect)
5922 for (unsigned j = 0, ee = OpInfo.Codes.size(); j != ee; ++j) {
5924 CType = TLI.getConstraintType(OpInfo.Codes[j]);
5945 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5951 if (OpInfo.hasMatchingInput()) {
5952 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
5954 if (OpInfo.ConstraintVT != Input.ConstraintVT) {
5956 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5957 OpInfo.ConstraintVT);
5961 if ((OpInfo.ConstraintVT.isInteger() !=
5968 Input.ConstraintVT = OpInfo.ConstraintVT;
5973 TLI.ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
5977 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5978 !OpInfo.isIndirect) {
5979 assert((OpInfo.isMultipleAlternative ||
5980 (OpInfo.Type == InlineAsm::isInput)) &&
5993 const Value *OpVal = OpInfo.CallOperandVal;
5996 OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
6008 OpInfo.CallOperand, StackSlot,
6011 OpInfo.CallOperand = StackSlot;
6015 OpInfo.CallOperandVal = 0;
6018 OpInfo.isIndirect = true;
6023 if (OpInfo.ConstraintType == TargetLowering::C_Register)
6024 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo);
6030 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
6034 if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
6035 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo);
6068 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
6070 switch (OpInfo.Type) {
6072 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
6073 OpInfo.ConstraintType != TargetLowering::C_Register) {
6075 assert(OpInfo.isIndirect && "Memory output must be indirect operand");
6081 AsmNodeOperands.push_back(OpInfo.CallOperand);
6089 if (OpInfo.AssignedRegs.Regs.empty()) {
6093 Twine(OpInfo.ConstraintCode) + "'");
6099 if (OpInfo.isIndirect) {
6100 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
6101 OpInfo.CallOperandVal));
6106 RetValRegs.append(OpInfo.AssignedRegs);
6111 OpInfo.AssignedRegs.AddInlineAsmOperands(OpInfo.isEarlyClobber ?
6121 SDValue InOperandVal = OpInfo.CallOperand;
6123 if (OpInfo.isMatchingInputConstraint()) { // Matching constraint?
6126 unsigned OperandNo = OpInfo.getMatchedOperand();
6146 if (OpInfo.isIndirect) {
6168 true, OpInfo.getMatchedOperand(),
6179 OpInfo.getMatchedOperand());
6187 if (OpInfo.ConstraintType == TargetLowering::C_Other &&
6188 OpInfo.isIndirect)
6189 OpInfo.ConstraintType = TargetLowering::C_Memory;
6191 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
6193 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
6199 Twine(OpInfo.ConstraintCode) + "'");
6212 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
6213 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
6225 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
6226 OpInfo.ConstraintType == TargetLowering::C_Register) &&
6228 assert(!OpInfo.isIndirect &&
6232 if (OpInfo.AssignedRegs.Regs.empty()) {
6236 Twine(OpInfo.ConstraintCode) + "'");
6240 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
6243 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
6250 if (!OpInfo.AssignedRegs.Regs.empty())
6251 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_Clobber,
