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Lines Matching defs:Parts

89                                       const SDValue *Parts, unsigned NumParts,
92 /// getCopyFromParts - Create a value that contains the specified legal parts
93 /// combined into the value they represent. If the parts combine to a type
98 const SDValue *Parts,
102 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT);
104 assert(NumParts > 0 && "No parts to assemble!");
106 SDValue Val = Parts[0];
109 // Assemble the value from multiple parts.
125 Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2,
127 Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2,
130 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
131 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
144 Parts + RoundParts, OddParts, PartVT, OddVT);
146 // Combine the round and odd parts.
159 // FP split into multiple FP parts (for ppcf128)
163 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
164 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
169 // FP split into integer parts (soft fp)
173 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT);
211 /// getCopyFromParts - Create a value that contains the specified legal parts
212 /// combined into the value they represent. If the parts combine to a type
217 const SDValue *Parts, unsigned NumParts,
220 assert(NumParts > 0 && "No parts to assemble!");
222 SDValue Val = Parts[0];
234 assert(RegisterVT == Parts[0].getValueType() &&
237 // Assemble the parts into intermediate operands.
243 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1,
247 // operands from the parts.
249 "Must expand into a divisible number of parts!");
252 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor,
271 // parts vector has more elements than the value vector, then we have a
318 SDValue Val, SDValue *Parts, unsigned NumParts,
322 /// split into legal parts. If the parts contain more bits than Val, then, for
325 SDValue Val, SDValue *Parts, unsigned NumParts,
332 return getCopyToPartsVector(DAG, DL, Val, Parts, NumParts, PartVT);
344 assert(NumParts == 1 && "No-op copy with multiple parts!");
345 Parts[0] = Val;
350 // If the parts cover more bits than the value has, promote the value.
368 // If the parts cover less bits than value has, truncate the value.
385 Parts[0] = Val;
389 // Expand the value into multiple parts.
391 // The number of parts is not a power of 2. Split off and copy the tail.
399 getCopyToParts(DAG, DL, OddVal, Parts + RoundParts, OddParts, PartVT);
402 // The odd parts were reversed by getCopyToParts - unreverse them.
403 std::reverse(Parts + RoundParts, Parts + NumParts);
410 // The number of parts is a power of 2. Repeatedly bisect the value using
412 Parts[0] = DAG.getNode(ISD::BITCAST, DL,
421 SDValue &Part0 = Parts[i];
422 SDValue &Part1 = Parts[i+StepSize/2];
437 std::reverse(Parts, Parts + OrigNumParts);
442 /// value split into legal parts.
444 SDValue Val, SDValue *Parts, unsigned NumParts,
498 Parts[0] = Val;
526 // Split the intermediate operands into legal parts.
531 getCopyToParts(DAG, DL, Ops[i], &Parts[i], 1, PartVT);
534 // legal parts.
536 "Must expand into a divisible number of parts!");
539 getCopyToParts(DAG, DL, Ops[i], &Parts[i*Factor], Factor, PartVT);
656 // Assemble the legal parts into the final values.
658 SmallVector<SDValue, 8> Parts;
660 // Copy the legal parts from the registers.
665 Parts.resize(NumRegs);
676 Parts[i] = P;
718 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
722 Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(),
725 Parts.clear();
741 // Get the list of the values's legal parts.
743 SmallVector<SDValue, 8> Parts(NumRegs);
750 &Parts[Part], NumParts, RegisterVT);
754 // Copy the parts into the registers.
759 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i]);
761 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Flag);
1215 SmallVector<SDValue, 4> Parts(NumParts);
1218 &Parts[0], NumParts, PartVT, ExtendKind);
1232 Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
1234 OutVals.push_back(Parts[i]);
5295 // Collect the legal value parts into potentially illegal values
6424 SmallVector<SDValue, 4> Parts(NumParts);
6432 getCopyToParts(DAG, dl, Op, &Parts[0], NumParts,
6437 ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
6445 OutVals.push_back(Parts[j]);
6500 // Collect the legal value parts into potentially illegal values