Lines Matching refs:Demanded
1124 /// are any bits set in the constant that are not demanded. If so, shrink the
1127 const APInt &Demanded) {
1140 (C->getAPIntValue() | (~Demanded)).isAllOnesValue())
1144 if (C->getAPIntValue().intersects(~Demanded)) {
1147 DAG.getConstant(Demanded &
1167 const APInt &Demanded,
1182 unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
1278 // If all of the demanded bits are known one on one side, return the other.
1284 // If all of the demanded bits in the inputs are known zeros, return zero.
1309 // If all of the demanded bits are known zero on one side, return the other.
1343 // If all of the demanded bits are known zero on one side, return the other.
1366 // If all of the demanded bits on one side are known, and all of the set
1450 // out) are never demanded.
1475 // are not demanded. This will likely allow the anyext to be folded away.
1514 // are never demanded.
1565 // If any of the demanded bits are produced by the sign extension, we also
1582 // are demanded, turn this into an unsigned shift right.
1612 // Sign extension. Compute the demanded bits in the result that are not
1618 // If none of the extended bits are demanded, eliminate the sextinreg.
1629 // Since the sign extended bits are demanded, we know that the sign
1630 // bit is demanded.
1660 // If none of the top bits are demanded, convert this into an any_extend.
1684 // If none of the top bits are demanded, convert this into an any_extend.
1690 // Since some of the sign extended bits are demanded, we know that the sign
1691 // bit is demanded.
1731 // Simplify the input, using demanded bit information, and compute the known
1743 // on the known demanded bits.
1750 // demanded.
1790 // demanded by its users.
1804 // thing demanded, turn this into a FGETSIGN.
1832 // of the highest bit demanded of them.
1852 // If we know the value of all of the demanded bits, return this as a
