Lines Matching defs:Def
105 if (!SlotIndex::isEarlierInstr(VNI->def, LSP.second) && VNI->def < MBBEnd)
130 UseSlots.push_back((*I)->def);
132 // Get use slots form the use-def chain.
215 // When not live in, the first use should be a def.
217 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
218 assert(LVI->start == BI.FirstInstr && "First instr should be a def");
248 // A LiveRange that starts in the middle of the block must be a def.
249 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
385 // Keep it as a simple def without any liveness.
391 SlotIndex Def = OldVNI->def;
392 LI->addRange(LiveRange(Def, Def.getDeadSlot(), OldVNI));
398 SlotIndex Def = VNI->def;
399 LI->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
416 // This was previously a single mapping. Make sure the old def is represented
418 SlotIndex Def = VNI->def;
419 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
430 SlotIndex Def;
440 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, TRI, Late);
446 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
452 return defValue(RegIdx, ParentVNI, Def);
488 return VNI->def;
506 return VNI->def;
522 RegAssign.insert(VNI->def, End, OpenIdx);
524 return VNI->def;
558 if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) &&
567 return VNI->def;
586 return VNI->def;
602 RegAssign.insert(Start, VNI->def, OpenIdx);
604 return VNI->def;
635 SlotIndex Def = VNI->def;
636 MachineInstr *MI = LIS.getInstructionFromIndex(Def);
645 DEBUG(dbgs() << "Removing " << Def << '\t' << *MI);
650 // Adjust RegAssign if a register assignment is killed at VNI->def. We
653 AssignI.find(VNI->def.getPrevSlot());
654 if (!AssignI.valid() || AssignI.start() >= Def)
657 if (AssignI.stop() != Def)
662 forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
676 assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def.");
692 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
699 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
709 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
740 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
741 assert(ParentVNI && "Parent not live at complement def");
748 MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def);
754 if (VNI->def == ParentVNI->def) {
755 DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n');
756 Dom = DomPair(ValMBB, VNI->def);
762 DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n');
768 Dom = DomPair(ValMBB, VNI->def);
770 // Two defs in the same block. Pick the earlier def.
771 if (!Dom.second.isValid() || VNI->def < Dom.second)
772 Dom.second = VNI->def;
778 // Def ValMBB dominates.
779 Dom = DomPair(ValMBB, VNI->def);
781 // None dominate. Hoist to common dominator, need new def.
785 DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def
786 << " for parent " << ParentVNI->id << '@' << ParentVNI->def
798 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def);
804 SA.getLastSplitPointIter(Dom.first))->def;
808 // def with the same value.
813 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
815 if (!Dom.first || Dom.second == VNI->def)
882 // The first block may be live-in, or it may have its own def.
885 assert(VNI && "Missing def for complex mapped value");
887 // MBB has its own def. Is it also live-out?
901 if (BlockStart == ParentVNI->def) {
902 // This block has the def of a parent PHI, so it isn't live-in.
905 assert(VNI && "Missing def for complex mapped parent PHI");
943 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
946 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
978 // which register we choose. When the use operand is tied to a def, we must
979 // use the same register as the def, so just do that always.
1019 if (LII->end != LII->valno->def.getDeadSlot())
1021 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
1022 assert(MI && "Missing instruction for dead def");
1051 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1052 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
1389 // >>>> Interference before def.
1401 // >>>> Interference before def.
