Lines Matching refs:isAdd
439 bool isAdd = true;
444 isAdd = false;
450 isAdd = false;
454 return isAdd;
714 bool isAdd = true;
720 isAdd = false ; // 'U' bit is set as part of the fixup.
739 isAdd = false;
744 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups);
748 if (isAdd)
769 bool isAdd = Imm8 >= 0;
780 if (isAdd)
794 bool isAdd = true;
800 isAdd = false ; // 'U' bit is set as part of the fixup.
809 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups);
819 if (isAdd)
908 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
913 // {12} = isAdd
923 if (isAdd)
933 // {12} isAdd
946 // {12} isAdd
951 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
961 return Binary | (isAdd << 12) | (isReg << 13);
967 // {4} isAdd
971 bool isAdd = MO1.getImm() != 0;
972 return getARMRegisterNumbering(MO.getReg()) | (isAdd << 4);
979 // {8} isAdd
985 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
991 return Imm8 | (isAdd << 8) | (isImm << 9);
999 // {8} isAdd
1020 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1026 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1076 bool isAdd;
1082 isAdd = false; // 'U' bit is handled as part of the fixup.
1096 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1101 if (isAdd)
